Evan Cheng 8409747efa Instead of adding copyfromreg's to handle physical definitions. Now isel can ... simply specify them as results and let scheduledag handle them. That is, instead of SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...) SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag) Just write: SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...) And let scheduledag emit the move from X86::EAX to a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40710 91177308-0d34-0410-b5e6-96231b3b80d8		2007-08-02 00:28:15 +00:00
..
CallingConvLower.cpp	add isVarArg to CCState	2007-06-19 00:11:09 +00:00
DAGCombiner.cpp	Fix the alias analysis query in DAGCombiner to not add in two	2007-07-26 16:14:06 +00:00
LegalizeDAG.cpp	Expand unaligned loads/stores when the target doesn't support them. (PR1548)	2007-08-01 19:34:21 +00:00
Makefile	For PR780:	2006-07-26 16:18:00 +00:00
ScheduleDAG.cpp	Instead of adding copyfromreg's to handle physical definitions. Now isel can	2007-08-02 00:28:15 +00:00
ScheduleDAGList.cpp	Skeleton of post-RA scheduler; doesn't do anything yet.	2007-07-13 17:13:54 +00:00
ScheduleDAGRRList.cpp	Skeleton of post-RA scheduler; doesn't do anything yet.	2007-07-13 17:13:54 +00:00
ScheduleDAGSimple.cpp	Skeleton of post-RA scheduler; doesn't do anything yet.	2007-07-13 17:13:54 +00:00
SelectionDAG.cpp	Support for trampolines, except for X86 codegen which is	2007-07-27 12:58:54 +00:00
SelectionDAGISel.cpp	Fix a bug in getCopyFromParts turned up in the testcase for PR1132.	2007-07-30 19:09:17 +00:00
SelectionDAGPrinter.cpp	Make chain dependencies blue, in addition to being dashed.	2007-06-18 15:30:16 +00:00
TargetLowering.cpp	Initialize the IndexedModeActions array with memset before	2007-07-09 20:49:44 +00:00