llvm-6502/test/CodeGen
Chandler Carruth ae464b2ba1 [x86] Teach the new vector shuffle lowering to use VPERMILPD for
single-input shuffles with doubles. This allows them to fold memory
operands into the shuffle, etc. This is just the analog to the v4f32
case in my prior commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218193 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-20 22:09:27 +00:00
..
AArch64 [FastIsel][AArch64] Fix a think-o in address computation. 2014-09-19 22:23:46 +00:00
ARM [ARM] Do not perform a tail call when the caller returns several values. 2014-09-18 21:17:50 +00:00
CPP
Generic Fix crash with an insertvalue that produces an empty object. 2014-09-20 00:10:47 +00:00
Hexagon
Inputs
Mips Add mips32 r1 to the list of supported targets for Mips fast-isel 2014-09-15 20:30:25 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX
PowerPC Optionally enable more-aggressive FMA formation in DAGCombine 2014-09-19 11:42:56 +00:00
R600 R600: Un-xfail a test which passes with pass disabled 2014-09-19 23:02:20 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Check-label a bit more specific 2014-09-03 13:32:08 +00:00
Thumb2
X86 [x86] Teach the new vector shuffle lowering to use VPERMILPD for 2014-09-20 22:09:27 +00:00
XCore