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3eb4be0ace
violation -- MC cannot depend on CodeGen. Specifically, the MCTargetDesc component of each target is actually a subcomponent of the MC library. As such, it cannot depend on the target-independent code generator, because MC itself cannot depend on the target-independent code generator. This change moved a flag from the ARM MCTargetDesc file ARMMCAsmInfo.cpp to the CodeGen layer in ARMException.cpp, leaving behind an 'extern' to refer back to it. That layering order isn't viable givin the constraints outlined above. Commandline flags are designed to be static specifically to avoid these types of bugs. Fixing this is likely going to require some non-trivial refactoring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148759 91177308-0d34-0410-b5e6-96231b3b80d8
88 lines
2.0 KiB
C++
88 lines
2.0 KiB
C++
//===-- ARMMCAsmInfo.cpp - ARM asm properties -------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the ARMMCAsmInfo properties.
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//
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//===----------------------------------------------------------------------===//
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#include "ARMMCAsmInfo.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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cl::opt<bool>
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EnableARMEHABI("arm-enable-ehabi", cl::Hidden,
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cl::desc("Generate ARM EHABI tables"),
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cl::init(false));
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static const char *const arm_asm_table[] = {
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"{r0}", "r0",
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"{r1}", "r1",
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"{r2}", "r2",
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"{r3}", "r3",
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"{r4}", "r4",
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"{r5}", "r5",
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"{r6}", "r6",
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"{r7}", "r7",
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"{r8}", "r8",
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"{r9}", "r9",
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"{r10}", "r10",
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"{r11}", "r11",
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"{r12}", "r12",
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"{r13}", "r13",
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"{r14}", "r14",
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"{lr}", "lr",
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"{sp}", "sp",
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"{ip}", "ip",
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"{fp}", "fp",
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"{sl}", "sl",
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"{memory}", "memory",
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"{cc}", "cc",
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0,0
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};
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void ARMMCAsmInfoDarwin::anchor() { }
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ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin() {
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AsmTransCBE = arm_asm_table;
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Data64bitsDirective = 0;
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CommentString = "@";
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Code16Directive = ".code\t16";
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Code32Directive = ".code\t32";
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SupportsDebugInformation = true;
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// Exceptions handling
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ExceptionsType = ExceptionHandling::SjLj;
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}
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void ARMELFMCAsmInfo::anchor() { }
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ARMELFMCAsmInfo::ARMELFMCAsmInfo() {
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// ".comm align is in bytes but .align is pow-2."
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AlignmentIsInBytes = false;
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Data64bitsDirective = 0;
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CommentString = "@";
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PrivateGlobalPrefix = ".L";
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Code16Directive = ".code\t16";
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Code32Directive = ".code\t32";
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WeakRefDirective = "\t.weak\t";
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LCOMMDirectiveType = LCOMM::NoAlignment;
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HasLEB128 = true;
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SupportsDebugInformation = true;
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// Exceptions handling
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if (EnableARMEHABI)
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ExceptionsType = ExceptionHandling::ARM;
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}
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