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51a8280fbb
Fixes PR17495, where an i24 triggered this code. It's intended to optimize i64 loads on 32 bit x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192123 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
1.5 KiB
LLVM
50 lines
1.5 KiB
LLVM
; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse | FileCheck %s
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define float @chainfail1(i64* nocapture %a, i64* nocapture %b, i32 %x, i32 %y, float* nocapture %f) nounwind uwtable noinline ssp {
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entry:
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%tmp1 = load i64* %a, align 8
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; Insure x87 ops are properly chained, order preserved.
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; CHECK: fildll
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%conv = sitofp i64 %tmp1 to float
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; CHECK: fstps
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store float %conv, float* %f, align 4
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; CHECK: idivl
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%div = sdiv i32 %x, %y
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%conv5 = sext i32 %div to i64
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store i64 %conv5, i64* %b, align 8
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ret float %conv
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}
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define float @chainfail2(i64* nocapture %a, i64* nocapture %b, i32 %x, i32 %y, float* nocapture %f) nounwind uwtable noinline ssp {
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entry:
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; CHECK: movl $0,
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store i64 0, i64* %b, align 8
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%mul = mul nsw i32 %y, %x
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%sub = add nsw i32 %mul, -1
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%idxprom = sext i32 %sub to i64
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%arrayidx = getelementptr inbounds i64* %a, i64 %idxprom
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%tmp4 = load i64* %arrayidx, align 8
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; CHECK: fildll
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%conv = sitofp i64 %tmp4 to float
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store float %conv, float* %f, align 4
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ret float %conv
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}
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define void @PR17495() {
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entry:
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br i1 undef, label %while.end, label %while.body
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while.body: ; preds = %while.body, %entry
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%x.1.copyload = load i24* undef, align 1
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%conv = sitofp i24 %x.1.copyload to float
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%div = fmul float %conv, 0x3E80000000000000
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store float %div, float* undef, align 4
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br i1 false, label %while.end, label %while.body
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while.end: ; preds = %while.body, %entry
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ret void
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; CHECK-LABEL: @PR17495
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; CHECK-NOT: fildll
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}
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