Jingyue Wu 87a2b36cf6 [NVPTX] Make the alignment an explicit argument to ldu/ldg ... Summary: Instead of specifying the alignment as metadata which may be destroyed by transformation passes, make the alignment the second argument to ldu/ldg intrinsic calls. Test Plan: ldu-ldg.ll ldu-i8.ll ldu-reg-plus-offset.ll Reviewers: eliben, meheff, jholewinski Reviewed By: meheff, jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D5093 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216731 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-29 15:30:20 +00:00
..
AArch64	AArch64: skip select/setcc combine in complex case.	2014-08-29 13:05:18 +00:00
ARM	[ARM] Make Thumb-2 code size optimization test more strict.	2014-08-29 15:13:35 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Don't use odd-numbered float registers for double arguments for fastcc	2014-08-22 09:23:22 +00:00
MSP430	Do not assume the value passed to memset is an i32.	2014-08-29 08:23:53 +00:00
NVPTX	[NVPTX] Make the alignment an explicit argument to ldu/ldg	2014-08-29 15:30:20 +00:00
PowerPC	[PowerPC] Add support for dcbtst and icbt (prefetch)	2014-08-23 23:21:04 +00:00
R600	R600/SI: Use READ2/WRITE2 instructions for 64-bit mem ops with 32-bit alignment	2014-08-22 18:49:35 +00:00
SPARC
SystemZ
Thumb	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
Thumb2	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
X86	[SKX] Enable lowering of integer CMP operations.	2014-08-29 08:46:04 +00:00
XCore