Kevin Qin 2daff76c05 [AArch64] Fix a bug generating incorrect instruction when building small vector. ... This bug is introduced by r211144. The element of operand may be smaller than the element of result, but previous commit can only handle the contrary condition. This commit is to handle this scenario and generate optimized codes like ZIP1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213830 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-24 02:05:42 +00:00
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AArch64	[AArch64] Fix a bug generating incorrect instruction when building small vector.	2014-07-24 02:05:42 +00:00
ARM	ARM: spot SBFX-compatbile code expressed with sign_extend_inreg	2014-07-23 13:59:12 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[mips] Fix two patterns that select i32's (for MIPS32r6) / i64's (for MIPS64r6)	2014-07-22 13:36:02 +00:00
MSP430
NVPTX	[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types	2014-07-23 20:23:49 +00:00
PowerPC	[SDAG] Make the DAGCombine worklist not grow endlessly due to duplicate	2014-07-23 07:08:53 +00:00
R600	[SDAG] Make the DAGCombine worklist not grow endlessly due to duplicate	2014-07-23 07:08:53 +00:00
SPARC
SystemZ
Thumb
Thumb2	ARM: spot SBFX-compatbile code expressed with sign_extend_inreg	2014-07-23 13:59:12 +00:00
X86	Fixed PR20411 - bug in getINSERTPS()	2014-07-24 01:28:21 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00