mirror of
https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
172 lines
5.8 KiB
LLVM
172 lines
5.8 KiB
LLVM
; RUN: llc -O3 -mtriple arm64-apple-ios3 %s -o - | FileCheck %s
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; <rdar://problem/13621857>
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@block = common global i8* null, align 8
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define i32 @fct(i32 %i1, i32 %i2) {
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; CHECK: @fct
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; Sign extension is used more than once, thus it should not be folded.
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; CodeGenPrepare is not sharing sext across uses, thus this is folded because
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; of that.
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; _CHECK-NOT_: , sxtw]
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entry:
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%idxprom = sext i32 %i1 to i64
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%0 = load i8** @block, align 8
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%arrayidx = getelementptr inbounds i8* %0, i64 %idxprom
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%1 = load i8* %arrayidx, align 1
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%idxprom1 = sext i32 %i2 to i64
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%arrayidx2 = getelementptr inbounds i8* %0, i64 %idxprom1
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%2 = load i8* %arrayidx2, align 1
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%cmp = icmp eq i8 %1, %2
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br i1 %cmp, label %if.end, label %if.then
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if.then: ; preds = %entry
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%cmp7 = icmp ugt i8 %1, %2
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%conv8 = zext i1 %cmp7 to i32
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br label %return
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if.end: ; preds = %entry
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%inc = add nsw i32 %i1, 1
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%inc9 = add nsw i32 %i2, 1
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%idxprom10 = sext i32 %inc to i64
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%arrayidx11 = getelementptr inbounds i8* %0, i64 %idxprom10
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%3 = load i8* %arrayidx11, align 1
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%idxprom12 = sext i32 %inc9 to i64
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%arrayidx13 = getelementptr inbounds i8* %0, i64 %idxprom12
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%4 = load i8* %arrayidx13, align 1
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%cmp16 = icmp eq i8 %3, %4
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br i1 %cmp16, label %if.end23, label %if.then18
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if.then18: ; preds = %if.end
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%cmp21 = icmp ugt i8 %3, %4
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%conv22 = zext i1 %cmp21 to i32
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br label %return
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if.end23: ; preds = %if.end
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%inc24 = add nsw i32 %i1, 2
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%inc25 = add nsw i32 %i2, 2
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%idxprom26 = sext i32 %inc24 to i64
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%arrayidx27 = getelementptr inbounds i8* %0, i64 %idxprom26
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%5 = load i8* %arrayidx27, align 1
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%idxprom28 = sext i32 %inc25 to i64
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%arrayidx29 = getelementptr inbounds i8* %0, i64 %idxprom28
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%6 = load i8* %arrayidx29, align 1
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%cmp32 = icmp eq i8 %5, %6
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br i1 %cmp32, label %return, label %if.then34
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if.then34: ; preds = %if.end23
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%cmp37 = icmp ugt i8 %5, %6
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%conv38 = zext i1 %cmp37 to i32
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br label %return
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return: ; preds = %if.end23, %if.then34, %if.then18, %if.then
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%retval.0 = phi i32 [ %conv8, %if.then ], [ %conv22, %if.then18 ], [ %conv38, %if.then34 ], [ 1, %if.end23 ]
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ret i32 %retval.0
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}
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define i32 @fct1(i32 %i1, i32 %i2) optsize {
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; CHECK: @fct1
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; Addressing are folded when optimizing for code size.
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; CHECK: , sxtw]
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; CHECK: , sxtw]
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entry:
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%idxprom = sext i32 %i1 to i64
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%0 = load i8** @block, align 8
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%arrayidx = getelementptr inbounds i8* %0, i64 %idxprom
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%1 = load i8* %arrayidx, align 1
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%idxprom1 = sext i32 %i2 to i64
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%arrayidx2 = getelementptr inbounds i8* %0, i64 %idxprom1
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%2 = load i8* %arrayidx2, align 1
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%cmp = icmp eq i8 %1, %2
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br i1 %cmp, label %if.end, label %if.then
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if.then: ; preds = %entry
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%cmp7 = icmp ugt i8 %1, %2
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%conv8 = zext i1 %cmp7 to i32
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br label %return
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if.end: ; preds = %entry
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%inc = add nsw i32 %i1, 1
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%inc9 = add nsw i32 %i2, 1
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%idxprom10 = sext i32 %inc to i64
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%arrayidx11 = getelementptr inbounds i8* %0, i64 %idxprom10
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%3 = load i8* %arrayidx11, align 1
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%idxprom12 = sext i32 %inc9 to i64
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%arrayidx13 = getelementptr inbounds i8* %0, i64 %idxprom12
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%4 = load i8* %arrayidx13, align 1
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%cmp16 = icmp eq i8 %3, %4
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br i1 %cmp16, label %if.end23, label %if.then18
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if.then18: ; preds = %if.end
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%cmp21 = icmp ugt i8 %3, %4
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%conv22 = zext i1 %cmp21 to i32
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br label %return
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if.end23: ; preds = %if.end
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%inc24 = add nsw i32 %i1, 2
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%inc25 = add nsw i32 %i2, 2
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%idxprom26 = sext i32 %inc24 to i64
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%arrayidx27 = getelementptr inbounds i8* %0, i64 %idxprom26
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%5 = load i8* %arrayidx27, align 1
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%idxprom28 = sext i32 %inc25 to i64
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%arrayidx29 = getelementptr inbounds i8* %0, i64 %idxprom28
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%6 = load i8* %arrayidx29, align 1
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%cmp32 = icmp eq i8 %5, %6
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br i1 %cmp32, label %return, label %if.then34
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if.then34: ; preds = %if.end23
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%cmp37 = icmp ugt i8 %5, %6
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%conv38 = zext i1 %cmp37 to i32
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br label %return
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return: ; preds = %if.end23, %if.then34, %if.then18, %if.then
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%retval.0 = phi i32 [ %conv8, %if.then ], [ %conv22, %if.then18 ], [ %conv38, %if.then34 ], [ 1, %if.end23 ]
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ret i32 %retval.0
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}
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; CHECK: @test
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; CHECK-NOT: , uxtw #2]
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define i32 @test(i32* %array, i8 zeroext %c, i32 %arg) {
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entry:
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%conv = zext i8 %c to i32
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%add = sub i32 0, %arg
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%tobool = icmp eq i32 %conv, %add
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%idxprom = zext i8 %c to i64
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%arrayidx = getelementptr inbounds i32* %array, i64 %idxprom
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%0 = load volatile i32* %arrayidx, align 4
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%1 = load volatile i32* %arrayidx, align 4
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%add3 = add nsw i32 %1, %0
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%res.0 = phi i32 [ %add3, %if.then ], [ 0, %entry ]
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ret i32 %res.0
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}
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; CHECK: @test2
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; CHECK: , uxtw #2]
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; CHECK: , uxtw #2]
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define i32 @test2(i32* %array, i8 zeroext %c, i32 %arg) optsize {
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entry:
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%conv = zext i8 %c to i32
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%add = sub i32 0, %arg
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%tobool = icmp eq i32 %conv, %add
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br i1 %tobool, label %if.end, label %if.then
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if.then: ; preds = %entry
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%idxprom = zext i8 %c to i64
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%arrayidx = getelementptr inbounds i32* %array, i64 %idxprom
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%0 = load volatile i32* %arrayidx, align 4
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%1 = load volatile i32* %arrayidx, align 4
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%add3 = add nsw i32 %1, %0
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br label %if.end
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if.end: ; preds = %entry, %if.then
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%res.0 = phi i32 [ %add3, %if.then ], [ 0, %entry ]
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ret i32 %res.0
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}
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