mirror of
https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
150 lines
4.5 KiB
LLVM
150 lines
4.5 KiB
LLVM
; RUN: llc < %s -march=arm64 -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -march=arm64 -aarch64-unscaled-mem-op=true\
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; RUN: -verify-machineinstrs | FileCheck -check-prefix=LDUR_CHK %s
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; CHECK: ldp_int
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; CHECK: ldp
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define i32 @ldp_int(i32* %p) nounwind {
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%tmp = load i32* %p, align 4
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%add.ptr = getelementptr inbounds i32* %p, i64 1
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%tmp1 = load i32* %add.ptr, align 4
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%add = add nsw i32 %tmp1, %tmp
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ret i32 %add
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}
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; CHECK: ldp_long
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; CHECK: ldp
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define i64 @ldp_long(i64* %p) nounwind {
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%tmp = load i64* %p, align 8
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%add.ptr = getelementptr inbounds i64* %p, i64 1
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%tmp1 = load i64* %add.ptr, align 8
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%add = add nsw i64 %tmp1, %tmp
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ret i64 %add
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}
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; CHECK: ldp_float
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; CHECK: ldp
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define float @ldp_float(float* %p) nounwind {
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%tmp = load float* %p, align 4
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%add.ptr = getelementptr inbounds float* %p, i64 1
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%tmp1 = load float* %add.ptr, align 4
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%add = fadd float %tmp, %tmp1
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ret float %add
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}
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; CHECK: ldp_double
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; CHECK: ldp
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define double @ldp_double(double* %p) nounwind {
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%tmp = load double* %p, align 8
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%add.ptr = getelementptr inbounds double* %p, i64 1
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%tmp1 = load double* %add.ptr, align 8
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%add = fadd double %tmp, %tmp1
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ret double %add
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}
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; Test the load/store optimizer---combine ldurs into a ldp, if appropriate
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define i32 @ldur_int(i32* %a) nounwind {
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; LDUR_CHK: ldur_int
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; LDUR_CHK: ldp [[DST1:w[0-9]+]], [[DST2:w[0-9]+]], [x0, #-8]
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; LDUR_CHK-NEXT: add w{{[0-9]+}}, [[DST2]], [[DST1]]
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; LDUR_CHK-NEXT: ret
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%p1 = getelementptr inbounds i32* %a, i32 -1
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%tmp1 = load i32* %p1, align 2
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%p2 = getelementptr inbounds i32* %a, i32 -2
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%tmp2 = load i32* %p2, align 2
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%tmp3 = add i32 %tmp1, %tmp2
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ret i32 %tmp3
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}
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define i64 @ldur_long(i64* %a) nounwind ssp {
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; LDUR_CHK: ldur_long
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; LDUR_CHK: ldp [[DST1:x[0-9]+]], [[DST2:x[0-9]+]], [x0, #-16]
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; LDUR_CHK-NEXT: add x{{[0-9]+}}, [[DST2]], [[DST1]]
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; LDUR_CHK-NEXT: ret
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%p1 = getelementptr inbounds i64* %a, i64 -1
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%tmp1 = load i64* %p1, align 2
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%p2 = getelementptr inbounds i64* %a, i64 -2
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%tmp2 = load i64* %p2, align 2
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%tmp3 = add i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define float @ldur_float(float* %a) {
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; LDUR_CHK: ldur_float
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; LDUR_CHK: ldp [[DST1:s[0-9]+]], [[DST2:s[0-9]+]], [x0, #-8]
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; LDUR_CHK-NEXT: add s{{[0-9]+}}, [[DST2]], [[DST1]]
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; LDUR_CHK-NEXT: ret
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%p1 = getelementptr inbounds float* %a, i64 -1
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%tmp1 = load float* %p1, align 2
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%p2 = getelementptr inbounds float* %a, i64 -2
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%tmp2 = load float* %p2, align 2
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%tmp3 = fadd float %tmp1, %tmp2
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ret float %tmp3
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}
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define double @ldur_double(double* %a) {
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; LDUR_CHK: ldur_double
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; LDUR_CHK: ldp [[DST1:d[0-9]+]], [[DST2:d[0-9]+]], [x0, #-16]
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; LDUR_CHK-NEXT: add d{{[0-9]+}}, [[DST2]], [[DST1]]
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; LDUR_CHK-NEXT: ret
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%p1 = getelementptr inbounds double* %a, i64 -1
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%tmp1 = load double* %p1, align 2
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%p2 = getelementptr inbounds double* %a, i64 -2
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%tmp2 = load double* %p2, align 2
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%tmp3 = fadd double %tmp1, %tmp2
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ret double %tmp3
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}
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; Now check some boundary conditions
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define i64 @pairUpBarelyIn(i64* %a) nounwind ssp {
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; LDUR_CHK: pairUpBarelyIn
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; LDUR_CHK-NOT: ldur
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; LDUR_CHK: ldp [[DST1:x[0-9]+]], [[DST2:x[0-9]+]], [x0, #-256]
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; LDUR_CHK-NEXT: add x{{[0-9]+}}, [[DST2]], [[DST1]]
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; LDUR_CHK-NEXT: ret
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%p1 = getelementptr inbounds i64* %a, i64 -31
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%tmp1 = load i64* %p1, align 2
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%p2 = getelementptr inbounds i64* %a, i64 -32
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%tmp2 = load i64* %p2, align 2
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%tmp3 = add i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define i64 @pairUpBarelyOut(i64* %a) nounwind ssp {
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; LDUR_CHK: pairUpBarelyOut
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; LDUR_CHK-NOT: ldp
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; Don't be fragile about which loads or manipulations of the base register
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; are used---just check that there isn't an ldp before the add
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; LDUR_CHK: add
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; LDUR_CHK-NEXT: ret
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%p1 = getelementptr inbounds i64* %a, i64 -32
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%tmp1 = load i64* %p1, align 2
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%p2 = getelementptr inbounds i64* %a, i64 -33
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%tmp2 = load i64* %p2, align 2
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%tmp3 = add i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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define i64 @pairUpNotAligned(i64* %a) nounwind ssp {
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; LDUR_CHK: pairUpNotAligned
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; LDUR_CHK-NOT: ldp
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; LDUR_CHK: ldur
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; LDUR_CHK-NEXT: ldur
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; LDUR_CHK-NEXT: add
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; LDUR_CHK-NEXT: ret
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%p1 = getelementptr inbounds i64* %a, i64 -18
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%bp1 = bitcast i64* %p1 to i8*
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%bp1p1 = getelementptr inbounds i8* %bp1, i64 1
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%dp1 = bitcast i8* %bp1p1 to i64*
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%tmp1 = load i64* %dp1, align 1
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%p2 = getelementptr inbounds i64* %a, i64 -17
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%bp2 = bitcast i64* %p2 to i8*
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%bp2p1 = getelementptr inbounds i8* %bp2, i64 1
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%dp2 = bitcast i8* %bp2p1 to i64*
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%tmp2 = load i64* %dp2, align 1
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%tmp3 = add i64 %tmp1, %tmp2
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ret i64 %tmp3
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}
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