mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-25 14:30:32 +00:00
29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
677 lines
28 KiB
LLVM
677 lines
28 KiB
LLVM
; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple -verify-machineinstrs | FileCheck %s
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define void @st1lane_16b(<16 x i8> %A, i8* %D) {
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; CHECK-LABEL: st1lane_16b
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; CHECK: st1.b
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%tmp = extractelement <16 x i8> %A, i32 1
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store i8 %tmp, i8* %D
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ret void
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}
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define void @st1lane_8h(<8 x i16> %A, i16* %D) {
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; CHECK-LABEL: st1lane_8h
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; CHECK: st1.h
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%tmp = extractelement <8 x i16> %A, i32 1
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store i16 %tmp, i16* %D
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ret void
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}
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define void @st1lane_4s(<4 x i32> %A, i32* %D) {
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; CHECK-LABEL: st1lane_4s
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; CHECK: st1.s
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%tmp = extractelement <4 x i32> %A, i32 1
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store i32 %tmp, i32* %D
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ret void
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}
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define void @st1lane_4s_float(<4 x float> %A, float* %D) {
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; CHECK-LABEL: st1lane_4s_float
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; CHECK: st1.s
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%tmp = extractelement <4 x float> %A, i32 1
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store float %tmp, float* %D
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ret void
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}
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define void @st1lane_2d(<2 x i64> %A, i64* %D) {
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; CHECK-LABEL: st1lane_2d
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; CHECK: st1.d
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%tmp = extractelement <2 x i64> %A, i32 1
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store i64 %tmp, i64* %D
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ret void
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}
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define void @st1lane_2d_double(<2 x double> %A, double* %D) {
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; CHECK-LABEL: st1lane_2d_double
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; CHECK: st1.d
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%tmp = extractelement <2 x double> %A, i32 1
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store double %tmp, double* %D
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ret void
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}
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define void @st1lane_8b(<8 x i8> %A, i8* %D) {
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; CHECK-LABEL: st1lane_8b
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; CHECK: st1.b
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%tmp = extractelement <8 x i8> %A, i32 1
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store i8 %tmp, i8* %D
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ret void
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}
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define void @st1lane_4h(<4 x i16> %A, i16* %D) {
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; CHECK-LABEL: st1lane_4h
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; CHECK: st1.h
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%tmp = extractelement <4 x i16> %A, i32 1
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store i16 %tmp, i16* %D
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ret void
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}
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define void @st1lane_2s(<2 x i32> %A, i32* %D) {
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; CHECK-LABEL: st1lane_2s
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; CHECK: st1.s
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%tmp = extractelement <2 x i32> %A, i32 1
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store i32 %tmp, i32* %D
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ret void
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}
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define void @st1lane_2s_float(<2 x float> %A, float* %D) {
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; CHECK-LABEL: st1lane_2s_float
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; CHECK: st1.s
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%tmp = extractelement <2 x float> %A, i32 1
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store float %tmp, float* %D
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ret void
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}
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define void @st2lane_16b(<16 x i8> %A, <16 x i8> %B, i8* %D) {
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; CHECK-LABEL: st2lane_16b
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; CHECK: st2.b
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call void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, i64 1, i8* %D)
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ret void
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}
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define void @st2lane_8h(<8 x i16> %A, <8 x i16> %B, i16* %D) {
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; CHECK-LABEL: st2lane_8h
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; CHECK: st2.h
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call void @llvm.aarch64.neon.st2lane.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, i64 1, i16* %D)
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ret void
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}
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define void @st2lane_4s(<4 x i32> %A, <4 x i32> %B, i32* %D) {
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; CHECK-LABEL: st2lane_4s
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; CHECK: st2.s
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call void @llvm.aarch64.neon.st2lane.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, i64 1, i32* %D)
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ret void
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}
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define void @st2lane_2d(<2 x i64> %A, <2 x i64> %B, i64* %D) {
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; CHECK-LABEL: st2lane_2d
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; CHECK: st2.d
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call void @llvm.aarch64.neon.st2lane.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, i64 1, i64* %D)
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ret void
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}
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declare void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8>, <16 x i8>, i64, i8*) nounwind readnone
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declare void @llvm.aarch64.neon.st2lane.v8i16.p0i16(<8 x i16>, <8 x i16>, i64, i16*) nounwind readnone
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declare void @llvm.aarch64.neon.st2lane.v4i32.p0i32(<4 x i32>, <4 x i32>, i64, i32*) nounwind readnone
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declare void @llvm.aarch64.neon.st2lane.v2i64.p0i64(<2 x i64>, <2 x i64>, i64, i64*) nounwind readnone
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define void @st3lane_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %D) {
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; CHECK-LABEL: st3lane_16b
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; CHECK: st3.b
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call void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i64 1, i8* %D)
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ret void
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}
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define void @st3lane_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %D) {
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; CHECK-LABEL: st3lane_8h
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; CHECK: st3.h
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call void @llvm.aarch64.neon.st3lane.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i64 1, i16* %D)
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ret void
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}
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define void @st3lane_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %D) {
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; CHECK-LABEL: st3lane_4s
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; CHECK: st3.s
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call void @llvm.aarch64.neon.st3lane.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i64 1, i32* %D)
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ret void
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}
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define void @st3lane_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %D) {
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; CHECK-LABEL: st3lane_2d
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; CHECK: st3.d
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call void @llvm.aarch64.neon.st3lane.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64 1, i64* %D)
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ret void
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}
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declare void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, i64, i8*) nounwind readnone
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declare void @llvm.aarch64.neon.st3lane.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, i64, i16*) nounwind readnone
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declare void @llvm.aarch64.neon.st3lane.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i64, i32*) nounwind readnone
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declare void @llvm.aarch64.neon.st3lane.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, i64, i64*) nounwind readnone
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define void @st4lane_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %E) {
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; CHECK-LABEL: st4lane_16b
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; CHECK: st4.b
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call void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 1, i8* %E)
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ret void
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}
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define void @st4lane_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %E) {
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; CHECK-LABEL: st4lane_8h
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; CHECK: st4.h
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call void @llvm.aarch64.neon.st4lane.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 1, i16* %E)
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ret void
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}
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define void @st4lane_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %E) {
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; CHECK-LABEL: st4lane_4s
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; CHECK: st4.s
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call void @llvm.aarch64.neon.st4lane.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 1, i32* %E)
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ret void
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}
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define void @st4lane_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %E) {
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; CHECK-LABEL: st4lane_2d
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; CHECK: st4.d
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call void @llvm.aarch64.neon.st4lane.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 1, i64* %E)
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ret void
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}
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declare void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i64, i8*) nounwind readnone
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declare void @llvm.aarch64.neon.st4lane.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i64, i16*) nounwind readnone
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declare void @llvm.aarch64.neon.st4lane.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i64, i32*) nounwind readnone
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declare void @llvm.aarch64.neon.st4lane.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64, i64*) nounwind readnone
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define void @st2_8b(<8 x i8> %A, <8 x i8> %B, i8* %P) nounwind {
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; CHECK-LABEL: st2_8b
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; CHECK st2.8b
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call void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, i8* %P)
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ret void
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}
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define void @st3_8b(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %P) nounwind {
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; CHECK-LABEL: st3_8b
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; CHECK st3.8b
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call void @llvm.aarch64.neon.st3.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %P)
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ret void
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}
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define void @st4_8b(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %P) nounwind {
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; CHECK-LABEL: st4_8b
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; CHECK st4.8b
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call void @llvm.aarch64.neon.st4.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %P)
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ret void
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}
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declare void @llvm.aarch64.neon.st2.v8i8.p0i8(<8 x i8>, <8 x i8>, i8*) nounwind readonly
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declare void @llvm.aarch64.neon.st3.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
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declare void @llvm.aarch64.neon.st4.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
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define void @st2_16b(<16 x i8> %A, <16 x i8> %B, i8* %P) nounwind {
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; CHECK-LABEL: st2_16b
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; CHECK st2.16b
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call void @llvm.aarch64.neon.st2.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, i8* %P)
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ret void
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}
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define void @st3_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %P) nounwind {
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; CHECK-LABEL: st3_16b
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; CHECK st3.16b
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call void @llvm.aarch64.neon.st3.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %P)
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ret void
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}
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define void @st4_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %P) nounwind {
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; CHECK-LABEL: st4_16b
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; CHECK st4.16b
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call void @llvm.aarch64.neon.st4.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %P)
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ret void
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}
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declare void @llvm.aarch64.neon.st2.v16i8.p0i8(<16 x i8>, <16 x i8>, i8*) nounwind readonly
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declare void @llvm.aarch64.neon.st3.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
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declare void @llvm.aarch64.neon.st4.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
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define void @st2_4h(<4 x i16> %A, <4 x i16> %B, i16* %P) nounwind {
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; CHECK-LABEL: st2_4h
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; CHECK st2.4h
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call void @llvm.aarch64.neon.st2.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, i16* %P)
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ret void
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}
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define void @st3_4h(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %P) nounwind {
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; CHECK-LABEL: st3_4h
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; CHECK st3.4h
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call void @llvm.aarch64.neon.st3.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %P)
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ret void
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}
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define void @st4_4h(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %P) nounwind {
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; CHECK-LABEL: st4_4h
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; CHECK st4.4h
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call void @llvm.aarch64.neon.st4.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %P)
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ret void
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}
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declare void @llvm.aarch64.neon.st2.v4i16.p0i16(<4 x i16>, <4 x i16>, i16*) nounwind readonly
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declare void @llvm.aarch64.neon.st3.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
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declare void @llvm.aarch64.neon.st4.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
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define void @st2_8h(<8 x i16> %A, <8 x i16> %B, i16* %P) nounwind {
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; CHECK-LABEL: st2_8h
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; CHECK st2.8h
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call void @llvm.aarch64.neon.st2.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, i16* %P)
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ret void
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}
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define void @st3_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %P) nounwind {
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; CHECK-LABEL: st3_8h
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; CHECK st3.8h
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call void @llvm.aarch64.neon.st3.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %P)
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ret void
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}
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define void @st4_8h(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %P) nounwind {
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; CHECK-LABEL: st4_8h
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; CHECK st4.8h
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call void @llvm.aarch64.neon.st4.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %P)
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ret void
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}
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declare void @llvm.aarch64.neon.st2.v8i16.p0i16(<8 x i16>, <8 x i16>, i16*) nounwind readonly
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declare void @llvm.aarch64.neon.st3.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
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declare void @llvm.aarch64.neon.st4.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
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define void @st2_2s(<2 x i32> %A, <2 x i32> %B, i32* %P) nounwind {
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; CHECK-LABEL: st2_2s
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; CHECK st2.2s
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call void @llvm.aarch64.neon.st2.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, i32* %P)
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ret void
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}
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define void @st3_2s(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %P) nounwind {
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; CHECK-LABEL: st3_2s
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; CHECK st3.2s
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call void @llvm.aarch64.neon.st3.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %P)
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ret void
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}
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define void @st4_2s(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %P) nounwind {
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; CHECK-LABEL: st4_2s
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; CHECK st4.2s
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call void @llvm.aarch64.neon.st4.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %P)
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ret void
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}
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declare void @llvm.aarch64.neon.st2.v2i32.p0i32(<2 x i32>, <2 x i32>, i32*) nounwind readonly
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declare void @llvm.aarch64.neon.st3.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
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declare void @llvm.aarch64.neon.st4.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
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define void @st2_4s(<4 x i32> %A, <4 x i32> %B, i32* %P) nounwind {
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; CHECK-LABEL: st2_4s
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; CHECK st2.4s
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call void @llvm.aarch64.neon.st2.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, i32* %P)
|
|
ret void
|
|
}
|
|
|
|
define void @st3_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %P) nounwind {
|
|
; CHECK-LABEL: st3_4s
|
|
; CHECK st3.4s
|
|
call void @llvm.aarch64.neon.st3.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %P)
|
|
ret void
|
|
}
|
|
|
|
define void @st4_4s(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %P) nounwind {
|
|
; CHECK-LABEL: st4_4s
|
|
; CHECK st4.4s
|
|
call void @llvm.aarch64.neon.st4.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %P)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.aarch64.neon.st2.v4i32.p0i32(<4 x i32>, <4 x i32>, i32*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st3.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st4.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
|
|
|
|
define void @st2_1d(<1 x i64> %A, <1 x i64> %B, i64* %P) nounwind {
|
|
; CHECK-LABEL: st2_1d
|
|
; CHECK st1.2d
|
|
call void @llvm.aarch64.neon.st2.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, i64* %P)
|
|
ret void
|
|
}
|
|
|
|
define void @st3_1d(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %P) nounwind {
|
|
; CHECK-LABEL: st3_1d
|
|
; CHECK st1.3d
|
|
call void @llvm.aarch64.neon.st3.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %P)
|
|
ret void
|
|
}
|
|
|
|
define void @st4_1d(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %P) nounwind {
|
|
; CHECK-LABEL: st4_1d
|
|
; CHECK st1.4d
|
|
call void @llvm.aarch64.neon.st4.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %P)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.aarch64.neon.st2.v1i64.p0i64(<1 x i64>, <1 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st3.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st4.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
|
|
|
|
define void @st2_2d(<2 x i64> %A, <2 x i64> %B, i64* %P) nounwind {
|
|
; CHECK-LABEL: st2_2d
|
|
; CHECK st2.2d
|
|
call void @llvm.aarch64.neon.st2.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, i64* %P)
|
|
ret void
|
|
}
|
|
|
|
define void @st3_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %P) nounwind {
|
|
; CHECK-LABEL: st3_2d
|
|
; CHECK st2.3d
|
|
call void @llvm.aarch64.neon.st3.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %P)
|
|
ret void
|
|
}
|
|
|
|
define void @st4_2d(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %P) nounwind {
|
|
; CHECK-LABEL: st4_2d
|
|
; CHECK st2.4d
|
|
call void @llvm.aarch64.neon.st4.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %P)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.aarch64.neon.st2.v2i64.p0i64(<2 x i64>, <2 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st3.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st4.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
|
|
|
|
declare void @llvm.aarch64.neon.st1x2.v8i8.p0i8(<8 x i8>, <8 x i8>, i8*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v4i16.p0i16(<4 x i16>, <4 x i16>, i16*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v2i32.p0i32(<2 x i32>, <2 x i32>, i32*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v2f32.p0f32(<2 x float>, <2 x float>, float*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v1i64.p0i64(<1 x i64>, <1 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v1f64.p0f64(<1 x double>, <1 x double>, double*) nounwind readonly
|
|
|
|
define void @st1_x2_v8i8(<8 x i8> %A, <8 x i8> %B, i8* %addr) {
|
|
; CHECK-LABEL: st1_x2_v8i8:
|
|
; CHECK: st1.8b { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, i8* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v4i16(<4 x i16> %A, <4 x i16> %B, i16* %addr) {
|
|
; CHECK-LABEL: st1_x2_v4i16:
|
|
; CHECK: st1.4h { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, i16* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v2i32(<2 x i32> %A, <2 x i32> %B, i32* %addr) {
|
|
; CHECK-LABEL: st1_x2_v2i32:
|
|
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, i32* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v2f32(<2 x float> %A, <2 x float> %B, float* %addr) {
|
|
; CHECK-LABEL: st1_x2_v2f32:
|
|
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v2f32.p0f32(<2 x float> %A, <2 x float> %B, float* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v1i64(<1 x i64> %A, <1 x i64> %B, i64* %addr) {
|
|
; CHECK-LABEL: st1_x2_v1i64:
|
|
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, i64* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v1f64(<1 x double> %A, <1 x double> %B, double* %addr) {
|
|
; CHECK-LABEL: st1_x2_v1f64:
|
|
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v1f64.p0f64(<1 x double> %A, <1 x double> %B, double* %addr)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.aarch64.neon.st1x2.v16i8.p0i8(<16 x i8>, <16 x i8>, i8*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v8i16.p0i16(<8 x i16>, <8 x i16>, i16*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v4i32.p0i32(<4 x i32>, <4 x i32>, i32*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v4f32.p0f32(<4 x float>, <4 x float>, float*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v2i64.p0i64(<2 x i64>, <2 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x2.v2f64.p0f64(<2 x double>, <2 x double>, double*) nounwind readonly
|
|
|
|
define void @st1_x2_v16i8(<16 x i8> %A, <16 x i8> %B, i8* %addr) {
|
|
; CHECK-LABEL: st1_x2_v16i8:
|
|
; CHECK: st1.16b { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, i8* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v8i16(<8 x i16> %A, <8 x i16> %B, i16* %addr) {
|
|
; CHECK-LABEL: st1_x2_v8i16:
|
|
; CHECK: st1.8h { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, i16* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v4i32(<4 x i32> %A, <4 x i32> %B, i32* %addr) {
|
|
; CHECK-LABEL: st1_x2_v4i32:
|
|
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, i32* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v4f32(<4 x float> %A, <4 x float> %B, float* %addr) {
|
|
; CHECK-LABEL: st1_x2_v4f32:
|
|
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v4f32.p0f32(<4 x float> %A, <4 x float> %B, float* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v2i64(<2 x i64> %A, <2 x i64> %B, i64* %addr) {
|
|
; CHECK-LABEL: st1_x2_v2i64:
|
|
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, i64* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x2_v2f64(<2 x double> %A, <2 x double> %B, double* %addr) {
|
|
; CHECK-LABEL: st1_x2_v2f64:
|
|
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x2.v2f64.p0f64(<2 x double> %A, <2 x double> %B, double* %addr)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.aarch64.neon.st1x3.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v2f32.p0f32(<2 x float>, <2 x float>, <2 x float>, float*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v1f64.p0f64(<1 x double>, <1 x double>, <1 x double>, double*) nounwind readonly
|
|
|
|
define void @st1_x3_v8i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %addr) {
|
|
; CHECK-LABEL: st1_x3_v8i8:
|
|
; CHECK: st1.8b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, i8* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v4i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %addr) {
|
|
; CHECK-LABEL: st1_x3_v4i16:
|
|
; CHECK: st1.4h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, i16* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v2i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %addr) {
|
|
; CHECK-LABEL: st1_x3_v2i32:
|
|
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, i32* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v2f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, float* %addr) {
|
|
; CHECK-LABEL: st1_x3_v2f32:
|
|
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v2f32.p0f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, float* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v1i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %addr) {
|
|
; CHECK-LABEL: st1_x3_v1i64:
|
|
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, i64* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v1f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, double* %addr) {
|
|
; CHECK-LABEL: st1_x3_v1f64:
|
|
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v1f64.p0f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, double* %addr)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.aarch64.neon.st1x3.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v4f32.p0f32(<4 x float>, <4 x float>, <4 x float>, float*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x3.v2f64.p0f64(<2 x double>, <2 x double>, <2 x double>, double*) nounwind readonly
|
|
|
|
define void @st1_x3_v16i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %addr) {
|
|
; CHECK-LABEL: st1_x3_v16i8:
|
|
; CHECK: st1.16b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, i8* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v8i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %addr) {
|
|
; CHECK-LABEL: st1_x3_v8i16:
|
|
; CHECK: st1.8h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, i16* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v4i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %addr) {
|
|
; CHECK-LABEL: st1_x3_v4i32:
|
|
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, i32* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v4f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, float* %addr) {
|
|
; CHECK-LABEL: st1_x3_v4f32:
|
|
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v4f32.p0f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, float* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v2i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %addr) {
|
|
; CHECK-LABEL: st1_x3_v2i64:
|
|
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, i64* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x3_v2f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, double* %addr) {
|
|
; CHECK-LABEL: st1_x3_v2f64:
|
|
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x3.v2f64.p0f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, double* %addr)
|
|
ret void
|
|
}
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|
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declare void @llvm.aarch64.neon.st1x4.v8i8.p0i8(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i8*) nounwind readonly
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declare void @llvm.aarch64.neon.st1x4.v4i16.p0i16(<4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i16*) nounwind readonly
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declare void @llvm.aarch64.neon.st1x4.v2i32.p0i32(<2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32*) nounwind readonly
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declare void @llvm.aarch64.neon.st1x4.v2f32.p0f32(<2 x float>, <2 x float>, <2 x float>, <2 x float>, float*) nounwind readonly
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declare void @llvm.aarch64.neon.st1x4.v1i64.p0i64(<1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i64*) nounwind readonly
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declare void @llvm.aarch64.neon.st1x4.v1f64.p0f64(<1 x double>, <1 x double>, <1 x double>, <1 x double>, double*) nounwind readonly
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define void @st1_x4_v8i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %addr) {
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; CHECK-LABEL: st1_x4_v8i8:
|
|
; CHECK: st1.8b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v8i8.p0i8(<8 x i8> %A, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i8* %addr)
|
|
ret void
|
|
}
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|
|
|
define void @st1_x4_v4i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %addr) {
|
|
; CHECK-LABEL: st1_x4_v4i16:
|
|
; CHECK: st1.4h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v4i16.p0i16(<4 x i16> %A, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i16* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v2i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %addr) {
|
|
; CHECK-LABEL: st1_x4_v2i32:
|
|
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v2i32.p0i32(<2 x i32> %A, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i32* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v2f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, <2 x float> %D, float* %addr) {
|
|
; CHECK-LABEL: st1_x4_v2f32:
|
|
; CHECK: st1.2s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v2f32.p0f32(<2 x float> %A, <2 x float> %B, <2 x float> %C, <2 x float> %D, float* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v1i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %addr) {
|
|
; CHECK-LABEL: st1_x4_v1i64:
|
|
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v1i64.p0i64(<1 x i64> %A, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v1f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, <1 x double> %D, double* %addr) {
|
|
; CHECK-LABEL: st1_x4_v1f64:
|
|
; CHECK: st1.1d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v1f64.p0f64(<1 x double> %A, <1 x double> %B, <1 x double> %C, <1 x double> %D, double* %addr)
|
|
ret void
|
|
}
|
|
|
|
declare void @llvm.aarch64.neon.st1x4.v16i8.p0i8(<16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i8*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x4.v8i16.p0i16(<8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i16*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x4.v4i32.p0i32(<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x4.v4f32.p0f32(<4 x float>, <4 x float>, <4 x float>, <4 x float>, float*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x4.v2i64.p0i64(<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, i64*) nounwind readonly
|
|
declare void @llvm.aarch64.neon.st1x4.v2f64.p0f64(<2 x double>, <2 x double>, <2 x double>, <2 x double>, double*) nounwind readonly
|
|
|
|
define void @st1_x4_v16i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %addr) {
|
|
; CHECK-LABEL: st1_x4_v16i8:
|
|
; CHECK: st1.16b { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v16i8.p0i8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i8* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v8i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %addr) {
|
|
; CHECK-LABEL: st1_x4_v8i16:
|
|
; CHECK: st1.8h { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v8i16.p0i16(<8 x i16> %A, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i16* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v4i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %addr) {
|
|
; CHECK-LABEL: st1_x4_v4i32:
|
|
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v4i32.p0i32(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i32* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v4f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, <4 x float> %D, float* %addr) {
|
|
; CHECK-LABEL: st1_x4_v4f32:
|
|
; CHECK: st1.4s { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v4f32.p0f32(<4 x float> %A, <4 x float> %B, <4 x float> %C, <4 x float> %D, float* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v2i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %addr) {
|
|
; CHECK-LABEL: st1_x4_v2i64:
|
|
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v2i64.p0i64(<2 x i64> %A, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64* %addr)
|
|
ret void
|
|
}
|
|
|
|
define void @st1_x4_v2f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, <2 x double> %D, double* %addr) {
|
|
; CHECK-LABEL: st1_x4_v2f64:
|
|
; CHECK: st1.2d { {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}} }, [x0]
|
|
call void @llvm.aarch64.neon.st1x4.v2f64.p0f64(<2 x double> %A, <2 x double> %B, <2 x double> %C, <2 x double> %D, double* %addr)
|
|
ret void
|
|
}
|