mirror of
https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
233 lines
7.8 KiB
LLVM
233 lines
7.8 KiB
LLVM
; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
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define <2 x float> @frecps_2s(<2 x float>* %A, <2 x float>* %B) nounwind {
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;CHECK-LABEL: frecps_2s:
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;CHECK: frecps.2s
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%tmp1 = load <2 x float>* %A
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%tmp2 = load <2 x float>* %B
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%tmp3 = call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
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ret <2 x float> %tmp3
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}
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define <4 x float> @frecps_4s(<4 x float>* %A, <4 x float>* %B) nounwind {
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;CHECK-LABEL: frecps_4s:
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;CHECK: frecps.4s
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%tmp1 = load <4 x float>* %A
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%tmp2 = load <4 x float>* %B
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%tmp3 = call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
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ret <4 x float> %tmp3
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}
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define <2 x double> @frecps_2d(<2 x double>* %A, <2 x double>* %B) nounwind {
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;CHECK-LABEL: frecps_2d:
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;CHECK: frecps.2d
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%tmp1 = load <2 x double>* %A
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%tmp2 = load <2 x double>* %B
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%tmp3 = call <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
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ret <2 x double> %tmp3
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}
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declare <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
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declare <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
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declare <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double>, <2 x double>) nounwind readnone
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define <2 x float> @frsqrts_2s(<2 x float>* %A, <2 x float>* %B) nounwind {
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;CHECK-LABEL: frsqrts_2s:
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;CHECK: frsqrts.2s
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%tmp1 = load <2 x float>* %A
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%tmp2 = load <2 x float>* %B
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%tmp3 = call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
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ret <2 x float> %tmp3
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}
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define <4 x float> @frsqrts_4s(<4 x float>* %A, <4 x float>* %B) nounwind {
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;CHECK-LABEL: frsqrts_4s:
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;CHECK: frsqrts.4s
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%tmp1 = load <4 x float>* %A
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%tmp2 = load <4 x float>* %B
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%tmp3 = call <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
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ret <4 x float> %tmp3
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}
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define <2 x double> @frsqrts_2d(<2 x double>* %A, <2 x double>* %B) nounwind {
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;CHECK-LABEL: frsqrts_2d:
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;CHECK: frsqrts.2d
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%tmp1 = load <2 x double>* %A
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%tmp2 = load <2 x double>* %B
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%tmp3 = call <2 x double> @llvm.aarch64.neon.frsqrts.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
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ret <2 x double> %tmp3
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}
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declare <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
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declare <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
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declare <2 x double> @llvm.aarch64.neon.frsqrts.v2f64(<2 x double>, <2 x double>) nounwind readnone
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define <2 x float> @frecpe_2s(<2 x float>* %A) nounwind {
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;CHECK-LABEL: frecpe_2s:
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;CHECK: frecpe.2s
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%tmp1 = load <2 x float>* %A
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%tmp3 = call <2 x float> @llvm.aarch64.neon.frecpe.v2f32(<2 x float> %tmp1)
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ret <2 x float> %tmp3
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}
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define <4 x float> @frecpe_4s(<4 x float>* %A) nounwind {
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;CHECK-LABEL: frecpe_4s:
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;CHECK: frecpe.4s
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%tmp1 = load <4 x float>* %A
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%tmp3 = call <4 x float> @llvm.aarch64.neon.frecpe.v4f32(<4 x float> %tmp1)
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ret <4 x float> %tmp3
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}
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define <2 x double> @frecpe_2d(<2 x double>* %A) nounwind {
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;CHECK-LABEL: frecpe_2d:
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;CHECK: frecpe.2d
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%tmp1 = load <2 x double>* %A
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%tmp3 = call <2 x double> @llvm.aarch64.neon.frecpe.v2f64(<2 x double> %tmp1)
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ret <2 x double> %tmp3
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}
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define float @frecpe_s(float* %A) nounwind {
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;CHECK-LABEL: frecpe_s:
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;CHECK: frecpe s0, {{s[0-9]+}}
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%tmp1 = load float* %A
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%tmp3 = call float @llvm.aarch64.neon.frecpe.f32(float %tmp1)
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ret float %tmp3
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}
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define double @frecpe_d(double* %A) nounwind {
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;CHECK-LABEL: frecpe_d:
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;CHECK: frecpe d0, {{d[0-9]+}}
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%tmp1 = load double* %A
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%tmp3 = call double @llvm.aarch64.neon.frecpe.f64(double %tmp1)
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ret double %tmp3
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}
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declare <2 x float> @llvm.aarch64.neon.frecpe.v2f32(<2 x float>) nounwind readnone
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declare <4 x float> @llvm.aarch64.neon.frecpe.v4f32(<4 x float>) nounwind readnone
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declare <2 x double> @llvm.aarch64.neon.frecpe.v2f64(<2 x double>) nounwind readnone
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declare float @llvm.aarch64.neon.frecpe.f32(float) nounwind readnone
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declare double @llvm.aarch64.neon.frecpe.f64(double) nounwind readnone
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define float @frecpx_s(float* %A) nounwind {
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;CHECK-LABEL: frecpx_s:
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;CHECK: frecpx s0, {{s[0-9]+}}
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%tmp1 = load float* %A
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%tmp3 = call float @llvm.aarch64.neon.frecpx.f32(float %tmp1)
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ret float %tmp3
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}
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define double @frecpx_d(double* %A) nounwind {
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;CHECK-LABEL: frecpx_d:
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;CHECK: frecpx d0, {{d[0-9]+}}
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%tmp1 = load double* %A
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%tmp3 = call double @llvm.aarch64.neon.frecpx.f64(double %tmp1)
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ret double %tmp3
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}
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declare float @llvm.aarch64.neon.frecpx.f32(float) nounwind readnone
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declare double @llvm.aarch64.neon.frecpx.f64(double) nounwind readnone
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define <2 x float> @frsqrte_2s(<2 x float>* %A) nounwind {
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;CHECK-LABEL: frsqrte_2s:
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;CHECK: frsqrte.2s
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%tmp1 = load <2 x float>* %A
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%tmp3 = call <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float> %tmp1)
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ret <2 x float> %tmp3
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}
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define <4 x float> @frsqrte_4s(<4 x float>* %A) nounwind {
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;CHECK-LABEL: frsqrte_4s:
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;CHECK: frsqrte.4s
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%tmp1 = load <4 x float>* %A
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%tmp3 = call <4 x float> @llvm.aarch64.neon.frsqrte.v4f32(<4 x float> %tmp1)
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ret <4 x float> %tmp3
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}
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define <2 x double> @frsqrte_2d(<2 x double>* %A) nounwind {
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;CHECK-LABEL: frsqrte_2d:
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;CHECK: frsqrte.2d
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%tmp1 = load <2 x double>* %A
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%tmp3 = call <2 x double> @llvm.aarch64.neon.frsqrte.v2f64(<2 x double> %tmp1)
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ret <2 x double> %tmp3
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}
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define float @frsqrte_s(float* %A) nounwind {
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;CHECK-LABEL: frsqrte_s:
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;CHECK: frsqrte s0, {{s[0-9]+}}
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%tmp1 = load float* %A
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%tmp3 = call float @llvm.aarch64.neon.frsqrte.f32(float %tmp1)
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ret float %tmp3
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}
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define double @frsqrte_d(double* %A) nounwind {
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;CHECK-LABEL: frsqrte_d:
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;CHECK: frsqrte d0, {{d[0-9]+}}
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%tmp1 = load double* %A
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%tmp3 = call double @llvm.aarch64.neon.frsqrte.f64(double %tmp1)
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ret double %tmp3
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}
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declare <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float>) nounwind readnone
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declare <4 x float> @llvm.aarch64.neon.frsqrte.v4f32(<4 x float>) nounwind readnone
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declare <2 x double> @llvm.aarch64.neon.frsqrte.v2f64(<2 x double>) nounwind readnone
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declare float @llvm.aarch64.neon.frsqrte.f32(float) nounwind readnone
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declare double @llvm.aarch64.neon.frsqrte.f64(double) nounwind readnone
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define <2 x i32> @urecpe_2s(<2 x i32>* %A) nounwind {
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;CHECK-LABEL: urecpe_2s:
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;CHECK: urecpe.2s
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%tmp1 = load <2 x i32>* %A
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%tmp3 = call <2 x i32> @llvm.aarch64.neon.urecpe.v2i32(<2 x i32> %tmp1)
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ret <2 x i32> %tmp3
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}
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define <4 x i32> @urecpe_4s(<4 x i32>* %A) nounwind {
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;CHECK-LABEL: urecpe_4s:
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;CHECK: urecpe.4s
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%tmp1 = load <4 x i32>* %A
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%tmp3 = call <4 x i32> @llvm.aarch64.neon.urecpe.v4i32(<4 x i32> %tmp1)
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ret <4 x i32> %tmp3
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}
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declare <2 x i32> @llvm.aarch64.neon.urecpe.v2i32(<2 x i32>) nounwind readnone
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declare <4 x i32> @llvm.aarch64.neon.urecpe.v4i32(<4 x i32>) nounwind readnone
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define <2 x i32> @ursqrte_2s(<2 x i32>* %A) nounwind {
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;CHECK-LABEL: ursqrte_2s:
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;CHECK: ursqrte.2s
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%tmp1 = load <2 x i32>* %A
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%tmp3 = call <2 x i32> @llvm.aarch64.neon.ursqrte.v2i32(<2 x i32> %tmp1)
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ret <2 x i32> %tmp3
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}
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define <4 x i32> @ursqrte_4s(<4 x i32>* %A) nounwind {
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;CHECK-LABEL: ursqrte_4s:
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;CHECK: ursqrte.4s
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%tmp1 = load <4 x i32>* %A
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%tmp3 = call <4 x i32> @llvm.aarch64.neon.ursqrte.v4i32(<4 x i32> %tmp1)
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ret <4 x i32> %tmp3
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}
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declare <2 x i32> @llvm.aarch64.neon.ursqrte.v2i32(<2 x i32>) nounwind readnone
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declare <4 x i32> @llvm.aarch64.neon.ursqrte.v4i32(<4 x i32>) nounwind readnone
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define float @f1(float %a, float %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: f1:
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; CHECK: frsqrts s0, s0, s1
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; CHECK-NEXT: ret
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%vrsqrtss.i = tail call float @llvm.aarch64.neon.frsqrts.f32(float %a, float %b) nounwind
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ret float %vrsqrtss.i
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}
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define double @f2(double %a, double %b) nounwind readnone optsize ssp {
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; CHECK-LABEL: f2:
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; CHECK: frsqrts d0, d0, d1
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; CHECK-NEXT: ret
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%vrsqrtsd.i = tail call double @llvm.aarch64.neon.frsqrts.f64(double %a, double %b) nounwind
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ret double %vrsqrtsd.i
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}
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declare double @llvm.aarch64.neon.frsqrts.f64(double, double) nounwind readnone
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declare float @llvm.aarch64.neon.frsqrts.f32(float, float) nounwind readnone
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