mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-25 14:30:32 +00:00
29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
153 lines
4.4 KiB
LLVM
153 lines
4.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu | FileCheck %s
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@var32 = global i32 0
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@var64 = global i64 0
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define void @rev_i32() {
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; CHECK-LABEL: rev_i32:
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%val0_tmp = load i32* @var32
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%val1_tmp = call i32 @llvm.bswap.i32(i32 %val0_tmp)
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; CHECK: rev {{w[0-9]+}}, {{w[0-9]+}}
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store volatile i32 %val1_tmp, i32* @var32
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ret void
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}
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define void @rev_i64() {
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; CHECK-LABEL: rev_i64:
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%val0_tmp = load i64* @var64
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%val1_tmp = call i64 @llvm.bswap.i64(i64 %val0_tmp)
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; CHECK: rev {{x[0-9]+}}, {{x[0-9]+}}
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store volatile i64 %val1_tmp, i64* @var64
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ret void
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}
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define void @rev32_i64() {
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; CHECK-LABEL: rev32_i64:
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%val0_tmp = load i64* @var64
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%val1_tmp = shl i64 %val0_tmp, 32
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%val5_tmp = sub i64 64, 32
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%val2_tmp = lshr i64 %val0_tmp, %val5_tmp
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%val3_tmp = or i64 %val1_tmp, %val2_tmp
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%val4_tmp = call i64 @llvm.bswap.i64(i64 %val3_tmp)
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; CHECK: rev32 {{x[0-9]+}}, {{x[0-9]+}}
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store volatile i64 %val4_tmp, i64* @var64
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ret void
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}
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define void @rev16_i32() {
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; CHECK-LABEL: rev16_i32:
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%val0_tmp = load i32* @var32
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%val1_tmp = shl i32 %val0_tmp, 16
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%val2_tmp = lshr i32 %val0_tmp, 16
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%val3_tmp = or i32 %val1_tmp, %val2_tmp
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%val4_tmp = call i32 @llvm.bswap.i32(i32 %val3_tmp)
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; CHECK: rev16 {{w[0-9]+}}, {{w[0-9]+}}
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store volatile i32 %val4_tmp, i32* @var32
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ret void
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}
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define void @clz_zerodef_i32() {
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; CHECK-LABEL: clz_zerodef_i32:
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%val0_tmp = load i32* @var32
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%val4_tmp = call i32 @llvm.ctlz.i32(i32 %val0_tmp, i1 0)
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; CHECK: clz {{w[0-9]+}}, {{w[0-9]+}}
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store volatile i32 %val4_tmp, i32* @var32
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ret void
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}
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define void @clz_zerodef_i64() {
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; CHECK-LABEL: clz_zerodef_i64:
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%val0_tmp = load i64* @var64
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%val4_tmp = call i64 @llvm.ctlz.i64(i64 %val0_tmp, i1 0)
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; CHECK: clz {{x[0-9]+}}, {{x[0-9]+}}
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store volatile i64 %val4_tmp, i64* @var64
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ret void
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}
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define void @clz_zeroundef_i32() {
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; CHECK-LABEL: clz_zeroundef_i32:
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%val0_tmp = load i32* @var32
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%val4_tmp = call i32 @llvm.ctlz.i32(i32 %val0_tmp, i1 1)
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; CHECK: clz {{w[0-9]+}}, {{w[0-9]+}}
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store volatile i32 %val4_tmp, i32* @var32
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ret void
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}
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define void @clz_zeroundef_i64() {
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; CHECK-LABEL: clz_zeroundef_i64:
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%val0_tmp = load i64* @var64
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%val4_tmp = call i64 @llvm.ctlz.i64(i64 %val0_tmp, i1 1)
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; CHECK: clz {{x[0-9]+}}, {{x[0-9]+}}
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store volatile i64 %val4_tmp, i64* @var64
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ret void
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}
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define void @cttz_zerodef_i32() {
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; CHECK-LABEL: cttz_zerodef_i32:
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%val0_tmp = load i32* @var32
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%val4_tmp = call i32 @llvm.cttz.i32(i32 %val0_tmp, i1 0)
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; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}}
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; CHECK: clz {{w[0-9]+}}, [[REVERSED]]
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store volatile i32 %val4_tmp, i32* @var32
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ret void
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}
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define void @cttz_zerodef_i64() {
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; CHECK-LABEL: cttz_zerodef_i64:
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%val0_tmp = load i64* @var64
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%val4_tmp = call i64 @llvm.cttz.i64(i64 %val0_tmp, i1 0)
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; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}}
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; CHECK: clz {{x[0-9]+}}, [[REVERSED]]
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store volatile i64 %val4_tmp, i64* @var64
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ret void
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}
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define void @cttz_zeroundef_i32() {
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; CHECK-LABEL: cttz_zeroundef_i32:
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%val0_tmp = load i32* @var32
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%val4_tmp = call i32 @llvm.cttz.i32(i32 %val0_tmp, i1 1)
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; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}}
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; CHECK: clz {{w[0-9]+}}, [[REVERSED]]
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store volatile i32 %val4_tmp, i32* @var32
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ret void
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}
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define void @cttz_zeroundef_i64() {
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; CHECK-LABEL: cttz_zeroundef_i64:
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%val0_tmp = load i64* @var64
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%val4_tmp = call i64 @llvm.cttz.i64(i64 %val0_tmp, i1 1)
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; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}}
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; CHECK: clz {{x[0-9]+}}, [[REVERSED]]
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store volatile i64 %val4_tmp, i64* @var64
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ret void
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}
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; These two are just compilation tests really: the operation's set to Expand in
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; ISelLowering.
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define void @ctpop_i32() {
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; CHECK-LABEL: ctpop_i32:
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%val0_tmp = load i32* @var32
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%val4_tmp = call i32 @llvm.ctpop.i32(i32 %val0_tmp)
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store volatile i32 %val4_tmp, i32* @var32
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ret void
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}
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define void @ctpop_i64() {
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; CHECK-LABEL: ctpop_i64:
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%val0_tmp = load i64* @var64
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%val4_tmp = call i64 @llvm.ctpop.i64(i64 %val0_tmp)
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store volatile i64 %val4_tmp, i64* @var64
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ret void
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}
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declare i32 @llvm.bswap.i32(i32)
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declare i64 @llvm.bswap.i64(i64)
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declare i32 @llvm.ctlz.i32 (i32, i1)
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declare i64 @llvm.ctlz.i64 (i64, i1)
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declare i32 @llvm.cttz.i32 (i32, i1)
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declare i64 @llvm.cttz.i64 (i64, i1)
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declare i32 @llvm.ctpop.i32 (i32)
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declare i64 @llvm.ctpop.i64 (i64)
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