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https://github.com/c64scene-ar/llvm-6502.git
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d6663f565c
This also uses TSFlags to mark machine instructions that are surface/texture accesses, as well as the vector width for surface operations. This is used to simplify some of the switch statements that need to detect surface/texture instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213256 91177308-0d34-0410-b5e6-96231b3b80d8
54 lines
2.0 KiB
LLVM
54 lines
2.0 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=SM20
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; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s --check-prefix=SM30
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target triple = "nvptx-unknown-cuda"
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declare i32 @llvm.nvvm.suld.1d.i32.trap(i64, i32)
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declare i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)*)
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; SM20-LABEL: .entry foo
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; SM30-LABEL: .entry foo
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define void @foo(i64 %img, float* %red, i32 %idx) {
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; SM20: ld.param.u64 %rd[[SURFREG:[0-9]+]], [foo_param_0];
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; SM20: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFREG]], {%r{{[0-9]+}}}]
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; SM30: ld.param.u64 %rd[[SURFREG:[0-9]+]], [foo_param_0];
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; SM30: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFREG]], {%r{{[0-9]+}}}]
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%val = tail call i32 @llvm.nvvm.suld.1d.i32.trap(i64 %img, i32 %idx)
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; SM20: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
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; SM30: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
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%ret = sitofp i32 %val to float
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; SM20: st.f32 [%r{{[0-9]+}}], %f[[REDF]]
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; SM30: st.f32 [%r{{[0-9]+}}], %f[[REDF]]
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store float %ret, float* %red
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ret void
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}
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@surf0 = internal addrspace(1) global i64 0, align 8
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; SM20-LABEL: .entry bar
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; SM30-LABEL: .entry bar
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define void @bar(float* %red, i32 %idx) {
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; SM30: mov.u64 %rd[[SURFHANDLE:[0-9]+]], surf0
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%surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf0)
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; SM20: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [surf0, {%r{{[0-9]+}}}]
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; SM30: suld.b.1d.b32.trap {%r[[RED:[0-9]+]]}, [%rd[[SURFHANDLE]], {%r{{[0-9]+}}}]
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%val = tail call i32 @llvm.nvvm.suld.1d.i32.trap(i64 %surfHandle, i32 %idx)
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; SM20: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
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; SM30: cvt.rn.f32.s32 %f[[REDF:[0-9]+]], %r[[RED]]
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%ret = sitofp i32 %val to float
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; SM20: st.f32 [%r{{[0-9]+}}], %f[[REDF]]
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; SM30: st.f32 [%r{{[0-9]+}}], %f[[REDF]]
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store float %ret, float* %red
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ret void
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}
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!nvvm.annotations = !{!1, !2, !3}
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!1 = metadata !{void (i64, float*, i32)* @foo, metadata !"kernel", i32 1}
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!2 = metadata !{void (float*, i32)* @bar, metadata !"kernel", i32 1}
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!3 = metadata !{i64 addrspace(1)* @surf0, metadata !"surface", i32 1}
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