llvm-6502/lib/Target
Evan Cheng 898101c15f X86 conditional branch support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 23:12:38 +00:00
..
Alpha fix FP selects 2005-12-12 20:30:09 +00:00
CBackend do not allow '.' in symbol names 2005-11-10 21:39:29 +00:00
IA64 Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted. 2005-12-05 02:34:29 +00:00
PowerPC This is handled by the autogen'd code 2005-12-18 21:06:11 +00:00
Skeleton Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
Sparc Fix pifft by correcting the case when a i64/f64 straddles O5 and memory: 2005-12-19 07:57:53 +00:00
SparcV8 Fix pifft by correcting the case when a i64/f64 straddles O5 and memory: 2005-12-19 07:57:53 +00:00
SparcV9 Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
X86 X86 conditional branch support. 2005-12-19 23:12:38 +00:00
Makefile DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now 2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Preparation of supporting scheduling info. Need to find info based on selected 2005-10-25 15:15:28 +00:00
Target.td Added support to specify predicates. 2005-12-14 22:02:59 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td add a marker 2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td X86 conditional branch support. 2005-12-19 23:12:38 +00:00
TargetSubtarget.cpp