llvm-6502/lib/CodeGen
Chris Lattner 8ace2cd034 implement MachineOperand::isIdenticalTo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31088 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-20 22:39:59 +00:00
..
SelectionDAG Make flag and chain edges visually distinguishable from value edges in DOT 2006-10-20 18:06:09 +00:00
AsmPrinter.cpp For PR950: 2006-10-20 07:07:24 +00:00
BranchFolding.cpp Teach the branch folder to update debug info if it removes blocks with line 2006-10-17 23:17:27 +00:00
DwarfWriter.cpp Do not leak all of the SourceLineInfo objects. Do not bother mallocing each 2006-10-17 22:06:46 +00:00
ELFWriter.cpp
IntrinsicLowering.cpp For PR950: 2006-10-20 07:07:24 +00:00
LiveInterval.cpp When joining two intervals where the RHS is really simple, use a light-weight 2006-09-02 05:26:59 +00:00
LiveIntervalAnalysis.cpp Keep track of the start of MBB's in a separate map from instructions. This 2006-09-15 03:57:23 +00:00
LiveVariables.cpp Fix for PR929. The PHI nodes were being gone through for each instruction 2006-10-03 07:20:20 +00:00
LLVMTargetMachine.cpp add the branch folding pass as a late cleanup pass for all targets. For now 2006-10-13 20:45:56 +00:00
MachineBasicBlock.cpp print labels even if a MBB doesn't have a corresponding LLVM BB, just don't 2006-10-06 21:28:17 +00:00
MachineDebugInfo.cpp For PR950: 2006-10-20 07:07:24 +00:00
MachineFunction.cpp Bugfixes 2006-10-03 20:19:23 +00:00
MachineInstr.cpp implement MachineOperand::isIdenticalTo 2006-10-20 22:39:59 +00:00
MachinePassRegistry.cpp
MachOWriter.cpp Behold, more work on relocations. Things are looking pretty good now. 2006-09-10 23:03:44 +00:00
Makefile
Passes.cpp
PHIElimination.cpp "Once more into the breach, dear friends, once more, or fill the wall up 2006-09-28 07:10:24 +00:00
PhysRegTracker.h
PrologEpilogInserter.cpp TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller. 2006-09-28 18:52:32 +00:00
RegAllocLinearScan.cpp
RegAllocLocal.cpp Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not 2006-09-19 18:02:01 +00:00
RegAllocSimple.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp restore my previous patch, now that the X86 backend bug has been fixed: 2006-10-12 17:45:38 +00:00
VirtRegMap.h Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00