mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-01 04:29:57 +00:00
One unusual feature of the z architecture is that the result of a previous load can be reused indefinitely for subsequent loads, even if a cache-coherent store to that location is performed by another CPU. A special serializing instruction must be used if you want to force a load to be reattempted. Since volatile loads are not supposed to be omitted in this way, we should insert a serializing instruction before each such load. The same goes for atomic loads. The patch implements this at the IR->DAG boundary, in a similar way to atomic fences. It is a no-op for targets other than SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196905 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
branch-range-01.py | ||
branch-range-02.py | ||
branch-range-03.py | ||
branch-range-04.py | ||
branch-range-05.py | ||
branch-range-06.py | ||
branch-range-07.py | ||
branch-range-08.py | ||
branch-range-09.py | ||
branch-range-10.py | ||
branch-range-11.py | ||
branch-range-12.py | ||
lit.local.cfg | ||
spill-01.py | ||
spill-02.py |