Jim Grosbach 91c655736e ARM64: Improve diagnostics for malformed reg+reg addressing mode. ... Make sure only general purpose registers are valid for offset regs and that 32-bit regs are only valid for sxtw and uxtw extends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206799 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-21 21:45:57 +00:00
..
adr.s	[ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all labels types	2014-04-09 14:44:12 +00:00
advsimd.s
aliases.s
arithmetic-encoding.s
arm64-fixup.s
basic-a64-instructions.s
bitfield-encoding.s
branch-encoding.s
crypto.s
diags.s	ARM64: Improve diagnostics for malformed reg+reg addressing mode.	2014-04-21 21:45:57 +00:00
directive_loh.s
elf-relocs.s
fp-encoding.s
large-relocs.s
lit.local.cfg
logical-encoding.s
mapping-across-sections.s
mapping-within-section.s
memory.s
nv-cond.s
optional-hash.s
separator.s
simd-ldst.s
small-data-fixups.s
spsel-sysreg.s
system-encoding.s
tls-modifiers-darwin.s
tls-relocs.s
variable-exprs.s
vector-lists.s
verbose-vector-case.s