llvm-6502/lib
2010-05-05 19:00:56 +00:00
..
Analysis Use the SCEVAddRecExpr::getPostIncExpr utility function instead 2010-05-04 01:12:27 +00:00
Archive
AsmParser Remove the API compatibility layer which converted add, sub, and mul 2010-05-03 22:44:19 +00:00
Bitcode
CodeGen Move REG_SEQUENCE removal to 2addr pass. 2010-05-05 18:45:40 +00:00
CompilerDriver
ExecutionEngine Remove the -enable-sjlj-eh option, which doesn't do anything. 2010-05-02 15:36:26 +00:00
Linker
MC MC: Make setVariableValue check the redefinition condition a bit more strongly. 2010-05-05 19:00:56 +00:00
Support Implement rdar://7415680 - Twine integer support lacks greatness 2010-05-05 18:40:33 +00:00
System
Target Model CONCAT_VECTORS of two 64-bit values as a REG_SEQUENCE. 2010-05-05 18:28:36 +00:00
Transforms Combine the implementations of the core part of the SSAUpdater and 2010-05-04 23:18:19 +00:00
VMCore Fix a problem exposed by my previous commit and noticed by a release-asserts 2010-05-04 14:25:42 +00:00
Makefile