llvm-6502/test/CodeGen
Che-Liang Chiou 8db2defa83 Add test case for PTX ret instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-25 07:49:54 +00:00
..
Alpha
ARM Enable code placement optimization pass for ARM. 2010-09-24 19:07:23 +00:00
Blackfin
CBackend
CellSPU Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction. 2010-09-16 12:29:33 +00:00
CPP
Generic
MBlaze
Mips Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
MSP430 CombinerAA is now reordering these stores. 2010-09-20 20:56:29 +00:00
PIC16
PowerPC
PTX Add test case for PTX ret instruction 2010-09-25 07:49:54 +00:00
SPARC
SystemZ Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
Thumb Disable codegen prepare critical edge splitting. Machine instruction passes now 2010-09-23 06:55:34 +00:00
Thumb2 Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 2010-09-21 22:51:46 +00:00
X86 Disable codegen prepare critical edge splitting. Machine instruction passes now 2010-09-23 06:55:34 +00:00
XCore Enable machine sinking critical edge splitting. e.g. 2010-09-20 22:52:00 +00:00
thumb2-mul.ll Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 2010-09-21 22:51:46 +00:00