mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-01 19:29:22 +00:00
This matches the format produced by the AMD proprietary driver. //==================================================================// // Shell script for converting .ll test cases: (Pass the .ll files you want to convert to this script as arguments). //==================================================================// ; This was necessary on my system so that A-Z in sed would match only ; upper case. I'm not sure why. export LC_ALL='C' TEST_FILES="$*" MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r` for f in $TEST_FILES; do # Check that there are SI tests: grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f if [ $? -eq 0 ]; then for match in $MATCHES; do sed -i -e "s/\([ :]$match\)/\L\1/" $f done # Try to get check lines with partial instruction names sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f fi done sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll //==================================================================// // Shell script for converting .td files (run this last) //==================================================================// export LC_ALL='C' sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
948 B
LLVM
37 lines
948 B
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
|
|
|
|
; FUNC-LABEL: {{^}}s_rotl_i64:
|
|
; SI-DAG: s_lshl_b64
|
|
; SI-DAG: s_sub_i32
|
|
; SI-DAG: s_lshr_b64
|
|
; SI: s_or_b64
|
|
; SI: s_endpgm
|
|
define void @s_rotl_i64(i64 addrspace(1)* %in, i64 %x, i64 %y) {
|
|
entry:
|
|
%0 = shl i64 %x, %y
|
|
%1 = sub i64 64, %y
|
|
%2 = lshr i64 %x, %1
|
|
%3 = or i64 %0, %2
|
|
store i64 %3, i64 addrspace(1)* %in
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}v_rotl_i64:
|
|
; SI-DAG: v_lshl_b64
|
|
; SI-DAG: v_sub_i32
|
|
; SI: v_lshr_b64
|
|
; SI: v_or_b32
|
|
; SI: v_or_b32
|
|
; SI: s_endpgm
|
|
define void @v_rotl_i64(i64 addrspace(1)* %in, i64 addrspace(1)* %xptr, i64 addrspace(1)* %yptr) {
|
|
entry:
|
|
%x = load i64 addrspace(1)* %xptr, align 8
|
|
%y = load i64 addrspace(1)* %yptr, align 8
|
|
%tmp0 = shl i64 %x, %y
|
|
%tmp1 = sub i64 64, %y
|
|
%tmp2 = lshr i64 %x, %tmp1
|
|
%tmp3 = or i64 %tmp0, %tmp2
|
|
store i64 %tmp3, i64 addrspace(1)* %in, align 8
|
|
ret void
|
|
}
|