mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-08 19:06:39 +00:00
8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
46 lines
2.3 KiB
LLVM
46 lines
2.3 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace %s
|
|
|
|
; CHECK-LABEL: {{^}}main:
|
|
; CHECK: s_load_dwordx4
|
|
; CHECK: s_load_dwordx4
|
|
; CHECK: s_waitcnt lgkmcnt(0){{$}}
|
|
; CHECK: s_waitcnt vmcnt(0){{$}}
|
|
; CHECK: s_waitcnt expcnt(0) lgkmcnt(0){{$}}
|
|
define void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) #0 {
|
|
main_body:
|
|
%tmp = getelementptr <16 x i8> addrspace(2)* %arg3, i32 0
|
|
%tmp10 = load <16 x i8> addrspace(2)* %tmp, !tbaa !0
|
|
%tmp11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp10, i32 0, i32 %arg6)
|
|
%tmp12 = extractelement <4 x float> %tmp11, i32 0
|
|
%tmp13 = extractelement <4 x float> %tmp11, i32 1
|
|
call void @llvm.AMDGPU.barrier.global() #1
|
|
%tmp14 = extractelement <4 x float> %tmp11, i32 2
|
|
; %tmp15 = extractelement <4 x float> %tmp11, i32 3
|
|
%tmp15 = load float addrspace(2)* %constptr, align 4 ; Force waiting for expcnt and lgkmcnt
|
|
%tmp16 = getelementptr <16 x i8> addrspace(2)* %arg3, i32 1
|
|
%tmp17 = load <16 x i8> addrspace(2)* %tmp16, !tbaa !0
|
|
%tmp18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp17, i32 0, i32 %arg6)
|
|
%tmp19 = extractelement <4 x float> %tmp18, i32 0
|
|
%tmp20 = extractelement <4 x float> %tmp18, i32 1
|
|
%tmp21 = extractelement <4 x float> %tmp18, i32 2
|
|
%tmp22 = extractelement <4 x float> %tmp18, i32 3
|
|
call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %tmp19, float %tmp20, float %tmp21, float %tmp22)
|
|
call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %tmp12, float %tmp13, float %tmp14, float %tmp15)
|
|
ret void
|
|
}
|
|
|
|
; Function Attrs: noduplicate nounwind
|
|
declare void @llvm.AMDGPU.barrier.global() #1
|
|
|
|
; Function Attrs: nounwind readnone
|
|
declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #2
|
|
|
|
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
|
|
|
|
attributes #0 = { "ShaderType"="1" }
|
|
attributes #1 = { noduplicate nounwind }
|
|
attributes #2 = { nounwind readnone }
|
|
|
|
!0 = metadata !{metadata !1, metadata !1, i64 0, i32 1}
|
|
!1 = metadata !{metadata !"const", null}
|