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Alpha
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Simplify this due to changes in the tblgen side
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2005-10-23 22:33:22 +00:00 |
CBackend
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fix CBackend/2005-09-27-VolatileFuncPtr.ll
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2005-09-27 20:52:44 +00:00 |
IA64
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Don't generate operations that aren't yet supported
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2005-10-21 01:52:45 +00:00 |
PowerPC
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mark this as beta
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2005-10-23 22:23:45 +00:00 |
Skeleton
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CR registers are not used by this "target"
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2005-09-30 06:43:58 +00:00 |
Sparc
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This file is entirely ifdef'd out
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2005-10-22 19:37:08 +00:00 |
SparcV8
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This file is entirely ifdef'd out
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2005-10-22 19:37:08 +00:00 |
SparcV9
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This fixes PR638:
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2005-10-19 20:07:15 +00:00 |
X86
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add a note that Nate mentioned last week
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2005-10-23 21:44:59 +00:00 |
Makefile
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Implement the --enable-targets= feature of the configure script. The make
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2005-04-22 17:20:11 +00:00 |
MRegisterInfo.cpp
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Rename MRegisterDesc -> TargetRegisterDesc for consistency
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2005-09-30 17:49:27 +00:00 |
SubtargetFeature.cpp
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If a user requests help, give them help on both features and processors
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2005-10-23 22:23:13 +00:00 |
Target.td
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Plugin new subtarget backend into the build.
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2005-10-21 19:05:19 +00:00 |
TargetData.cpp
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Update to use the new MathExtras.h support for log2 computation.
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2005-08-02 19:26:06 +00:00 |
TargetFrameInfo.cpp
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Eliminate all remaining tabs and trailing spaces.
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2005-07-27 06:12:32 +00:00 |
TargetInstrInfo.cpp
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Convert tabs to spaces
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2005-04-22 17:54:37 +00:00 |
TargetMachine.cpp
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Remove the X86 and PowerPC Simple instruction selectors; their time has
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2005-08-18 23:53:15 +00:00 |
TargetMachineRegistry.cpp
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1. Use SubtargetFeatures in llc/lli.
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2005-09-01 21:38:21 +00:00 |
TargetSchedInfo.cpp
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Convert tabs to spaces
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2005-04-22 17:54:37 +00:00 |
TargetSchedule.td
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add a marker
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2005-10-23 22:07:20 +00:00 |
TargetSelectionDAG.td
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Use a literal to define ineg instead of immzero
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2005-10-20 23:30:37 +00:00 |
TargetSubtarget.cpp
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Eliminate all remaining tabs and trailing spaces.
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2005-07-27 06:12:32 +00:00 |