Rafael Espindola 8f6631cdb6 Don't use nopl in cpus that don't support it. ... Patch by Mikulas Patocka. I added the test. I checked that for cpu names that gas knows about, it also doesn't generate nopl. The modified cpus: i686 - there are i686-class CPUs that don't have nopl: Via c3, Transmeta Crusoe, Microsoft VirtualBox - see https://bbs.archlinux.org/viewtopic.php?pid=775414 k6, k6-2, k6-3, winchip-c6, winchip2 - these are 586-class CPUs via c3 c3-2 - see https://bugs.archlinux.org/task/19733 as a proof that Via c3 and c3-Nehemiah don't have nopl git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195679 91177308-0d34-0410-b5e6-96231b3b80d8		2013-11-25 20:15:14 +00:00
..
AlignedBundling	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
3DNow.s
2011-09-06-NoNewline.s
address-size.s	Fix generation of the address size override prefix. Add assertions for	2012-03-21 05:48:07 +00:00
avx512-encodings.s	Add XOP disassembler support. Fixes PR13933.	2013-10-03 05:17:48 +00:00
cfi_def_cfa-crash.s	X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable()	2013-11-08 22:33:06 +00:00
fde-reloc.s	Move test since it depends on the X86 backend.	2013-03-28 17:01:28 +00:00
gnux32-dwarf-gen.s	Now that llvm-dwarfdump supports flags to specify which DWARF section to dump,	2013-01-25 21:44:53 +00:00
intel-syntax-2.s	Add newline.	2012-09-10 23:09:27 +00:00
intel-syntax-encoding.s	Post process ADC/SBB and use a shorter encoding if they use a sign extended immediate.	2013-03-18 03:34:55 +00:00
intel-syntax-hex.s	'Hexadecimal' has two 'a's and only one 'i'.	2013-02-25 18:11:18 +00:00
intel-syntax.s	Fixing Intel format of the vshufpd instruction.	2013-09-27 01:44:23 +00:00
lit.local.cfg	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
padlock.s
shuffle-comments.s	Merge SSE and AVX shuffle instructions in the comment printer.	2013-01-29 07:54:31 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s	Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.	2013-10-14 04:55:01 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s	Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.	2013-10-14 04:55:01 +00:00
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s	Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185.	2013-03-14 07:40:52 +00:00
x86_64-hle-encoding.s	Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.	2013-06-18 17:08:10 +00:00
x86_64-imm-widths.s
x86_64-rand-encoding.s	Add support of RDSEED defined in AVX2 extension	2013-03-28 23:41:26 +00:00
x86_64-rtm-encoding.s	x86 -- add the XTEST instruction	2013-03-25 18:59:43 +00:00
x86_64-sse4a.s	Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.	2012-05-29 19:05:25 +00:00
x86_64-tbm-encoding.s	Adding intrinsics to the llvm backend for TBM instruction set.	2013-09-27 18:38:42 +00:00
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s	[ms-inline asm] Fix a crasher when we fail on a direct match.	2013-05-10 18:24:17 +00:00
x86_long_nop.s	Fixes a test by replacing .align by .p2align and setting triples explicitly.	2013-03-05 18:56:14 +00:00
x86_nop.s	Don't use nopl in cpus that don't support it.	2013-11-25 20:15:14 +00:00
x86_operands.s
x86-32-avx.s	Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior.	2013-01-06 20:39:29 +00:00
x86-32-coverage.s	Add test cases for the various instruction alias and Intel syntax fixes that have gone in lately.	2013-07-26 05:39:33 +00:00
x86-32-fma3.s
x86-32-ms-inline-asm.s	[ms-inline asm] Add support of imm displacement before bracketed memory	2013-03-27 21:49:56 +00:00
x86-32.s	Don't let x86 asm printer use the no operand movsd alias. It should use the normal movsl instead.	2013-07-23 01:50:47 +00:00
x86-64.s	Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.	2013-10-14 04:55:01 +00:00