Nadav Rotem 8ffad56f8e Implement vector-select support for avx256. Refactor the vblend implementation to have tablegen match the instruction by the node type ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139400 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-09 20:29:17 +00:00
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Alpha
ARM	Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.	2011-09-08 22:59:09 +00:00
Blackfin
CBackend
CellSPU	Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.	2011-09-02 10:05:01 +00:00
CPP
Generic	This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll	2011-09-08 08:43:23 +00:00
MBlaze
Mips	Drop support for Allegrex. Allegrex implements a variant of Mips2.	2011-09-09 19:00:51 +00:00
MSP430
PowerPC	Split the init.trampoline intrinsic, which currently combines GCC's	2011-09-06 13:37:06 +00:00
PTX
SPARC
SystemZ
Thumb	Disable these tests harder. They're XFAIL'd, but that means they still run, and	2011-09-06 22:08:18 +00:00
Thumb2
X86	Implement vector-select support for avx256. Refactor the vblend implementation to have tablegen match the instruction by the node type	2011-09-09 20:29:17 +00:00
XCore	Split the init.trampoline intrinsic, which currently combines GCC's	2011-09-06 13:37:06 +00:00