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I can see with the original code was that I forgot that this runs after type legalization and hence the result type will always be i32. (Custom legalization of EXTRACT_VECTOR_ELT is only enabled for vector types with 8- and 16-bit elements.) Regarding the FIXME comment: any information about sign and zero-extension should be captured by separate extension operations. The DAG combiner should handle those to produce either VGETLANEu or VGETLANEs, and that seems to be working now. If there are cases that we're missing, let me know. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84218 91177308-0d34-0410-b5e6-96231b3b80d8 |
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