llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-08 19:06:39 +00:00

History

Bill Wendling 9468a9b6be - Change "ExternalSymbolSDNode" to "SymbolSDNode". - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8		2008-09-16 21:12:30 +00:00
..
Alpha.h
Alpha.td
AlphaAsmPrinter.cpp
AlphaBranchSelector.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaCodeEmitter.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested	2008-08-26 18:03:31 +00:00
AlphaInstrInfo.h	Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested	2008-08-26 18:03:31 +00:00
AlphaInstrInfo.td	Rename ConstantSDNode::getValue to getZExtValue, for consistency	2008-09-12 16:56:44 +00:00
AlphaISelDAGToDAG.cpp	Rename ConstantSDNode::getValue to getZExtValue, for consistency	2008-09-12 16:56:44 +00:00
AlphaISelLowering.cpp	- Change "ExternalSymbolSDNode" to "SymbolSDNode".	2008-09-16 21:12:30 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp
AlphaTargetMachine.h
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html