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llvm-6502/lib/Target/IA64
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Bill Wendling 587daedce2 Change MachineInstrBuilder::addReg() to take a flag instead of a list of 
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 21:33:08 +00:00
..
AsmPrinter Rename PaddedSize to AllocSize, in the hope that this 2009-05-09 07:06:46 +00:00
CMakeLists.txt CMake: removed IA64AsmPrinter.cpp from lib/Target/IA64/CMakeLists.txt 2009-04-03 12:11:43 +00:00
IA64.h Instead of passing in an unsigned value for the optimization level, use an enum, 2009-04-29 23:29:43 +00:00
IA64.td Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 2008-11-24 07:34:46 +00:00
IA64Bundling.cpp Remove non-DebugLoc versions of BuildMI from IA64, Mips. 2009-02-13 02:34:39 +00:00
IA64InstrBuilder.h Fix constant pool loads, and remove broken versions of addConstantPoolReference. 2008-09-06 01:11:01 +00:00
IA64InstrFormats.td
IA64InstrInfo.cpp Change MachineInstrBuilder::addReg() to take a flag instead of a list of 2009-05-13 21:33:08 +00:00
IA64InstrInfo.h Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 2009-01-20 19:12:24 +00:00
IA64InstrInfo.td Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. 2008-12-03 18:15:48 +00:00
IA64ISelDAGToDAG.cpp Get rid of one more non-DebugLoc getNode and 2009-02-06 01:31:28 +00:00
IA64ISelLowering.cpp Remove non-DebugLoc versions of BuildMI from IA64, Mips. 2009-02-13 02:34:39 +00:00
IA64ISelLowering.h Make LowerCallTo and LowerArguments take a DebugLoc 2009-01-30 23:10:59 +00:00
IA64MachineFunctionInfo.h
IA64RegisterInfo.cpp Propagate debug loc info through prologue/epilogue. 2009-02-23 00:42:30 +00:00
IA64RegisterInfo.h
IA64RegisterInfo.td
IA64Subtarget.cpp Give IA64 a TargetSubtarget subclass, so that it can 2009-01-16 22:49:36 +00:00
IA64Subtarget.h Give IA64 a TargetSubtarget subclass, so that it can 2009-01-16 22:49:36 +00:00
IA64TargetAsmInfo.cpp IA64 is as weird as Alpha wrt r/o relocs :) 2009-03-29 17:14:35 +00:00
IA64TargetAsmInfo.h IA64 is as weird as Alpha wrt r/o relocs :) 2009-03-29 17:14:35 +00:00
IA64TargetMachine.cpp Instead of passing in an unsigned value for the optimization level, use an enum, 2009-04-29 23:29:43 +00:00
IA64TargetMachine.h Instead of passing in an unsigned value for the optimization level, use an enum, 2009-04-29 23:29:43 +00:00
Makefile Move IA64 asmprinter to separate library 2009-04-03 10:38:51 +00:00
README

README 

TODO:
  - Un-bitrot ISel
  - Hook up If-Conversion a la ARM target
  - Hook up all branch analysis functions
  - Instruction scheduling
  - Bundling
  - Dynamic Optimization
  - Testing and bugfixing
  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:
  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:
  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:
  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:
  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.