mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8eaed0f63d
This matches the format produced by the AMD proprietary driver.
//==================================================================//
// Shell script for converting .ll test cases: (Pass the .ll files
you want to convert to this script as arguments).
//==================================================================//
; This was necessary on my system so that A-Z in sed would match only
; upper case. I'm not sure why.
export LC_ALL='C'
TEST_FILES="$*"
MATCHES=`grep -v Patterns SIInstructions.td | grep -o '"[A-Z0-9_]\+["e]' | grep -o '[A-Z0-9_]\+' | sort -r`
for f in $TEST_FILES; do
# Check that there are SI tests:
grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f
if [ $? -eq 0 ]; then
for match in $MATCHES; do
sed -i -e "s/\([ :]$match\)/\L\1/" $f
done
# Try to get check lines with partial instruction names
sed -i 's/\(;[ ]*SI[A-Z\\-]*: \)\([A-Z_0-9]\+\)/\1\L\2/' $f
fi
done
sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll
sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.*32.ll ../../../test/CodeGen/R600/sext-in-reg.ll
sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll
sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll
sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll
//==================================================================//
// Shell script for converting .td files (run this last)
//==================================================================//
export LC_ALL='C'
sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td
sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221350 91177308-0d34-0410-b5e6-96231b3b80d8
252 lines
9.2 KiB
LLVM
252 lines
9.2 KiB
LLVM
; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
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; FIXME: Broken on evergreen
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; FIXME: For some reason the 8 and 16 vectors are being stored as
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; individual elements instead of 128-bit stores.
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; FIXME: Why is the constant moved into the intermediate register and
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; not just directly into the vector component?
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; SI-LABEL: {{^}}insertelement_v4f32_0:
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; s_load_dwordx4 s{{[}}[[LOW_REG:[0-9]+]]:
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; v_mov_b32_e32
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; v_mov_b32_e32 [[CONSTREG:v[0-9]+]], 5.000000e+00
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; v_mov_b32_e32 v[[LOW_REG]], [[CONSTREG]]
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; buffer_store_dwordx4 v{{[}}[[LOW_REG]]:
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define void @insertelement_v4f32_0(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
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%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 0
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store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}insertelement_v4f32_1:
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define void @insertelement_v4f32_1(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
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%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 1
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store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}insertelement_v4f32_2:
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define void @insertelement_v4f32_2(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
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%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 2
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store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}insertelement_v4f32_3:
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define void @insertelement_v4f32_3(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
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%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 3
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store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}insertelement_v4i32_0:
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define void @insertelement_v4i32_0(<4 x i32> addrspace(1)* %out, <4 x i32> %a) nounwind {
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%vecins = insertelement <4 x i32> %a, i32 999, i32 0
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store <4 x i32> %vecins, <4 x i32> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v2f32:
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; SI: v_mov_b32_e32 [[CONST:v[0-9]+]], 0x40a00000
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; SI: v_movreld_b32_e32 v[[LOW_RESULT_REG:[0-9]+]], [[CONST]]
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; SI: buffer_store_dwordx2 {{v\[}}[[LOW_RESULT_REG]]:
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define void @dynamic_insertelement_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, i32 %b) nounwind {
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%vecins = insertelement <2 x float> %a, float 5.000000e+00, i32 %b
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store <2 x float> %vecins, <2 x float> addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v4f32:
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; SI: v_mov_b32_e32 [[CONST:v[0-9]+]], 0x40a00000
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; SI: v_movreld_b32_e32 v[[LOW_RESULT_REG:[0-9]+]], [[CONST]]
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; SI: buffer_store_dwordx4 {{v\[}}[[LOW_RESULT_REG]]:
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define void @dynamic_insertelement_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %a, i32 %b) nounwind {
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%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 %b
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store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v8f32:
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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define void @dynamic_insertelement_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %a, i32 %b) nounwind {
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%vecins = insertelement <8 x float> %a, float 5.000000e+00, i32 %b
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store <8 x float> %vecins, <8 x float> addrspace(1)* %out, align 32
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v16f32:
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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define void @dynamic_insertelement_v16f32(<16 x float> addrspace(1)* %out, <16 x float> %a, i32 %b) nounwind {
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%vecins = insertelement <16 x float> %a, float 5.000000e+00, i32 %b
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store <16 x float> %vecins, <16 x float> addrspace(1)* %out, align 64
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v2i32:
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; SI: buffer_store_dwordx2
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define void @dynamic_insertelement_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, i32 %b) nounwind {
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%vecins = insertelement <2 x i32> %a, i32 5, i32 %b
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store <2 x i32> %vecins, <2 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v4i32:
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; SI: buffer_store_dwordx4
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define void @dynamic_insertelement_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %a, i32 %b) nounwind {
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%vecins = insertelement <4 x i32> %a, i32 5, i32 %b
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store <4 x i32> %vecins, <4 x i32> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v8i32:
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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define void @dynamic_insertelement_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> %a, i32 %b) nounwind {
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%vecins = insertelement <8 x i32> %a, i32 5, i32 %b
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store <8 x i32> %vecins, <8 x i32> addrspace(1)* %out, align 32
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v16i32:
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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; FIXMESI: buffer_store_dwordx4
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define void @dynamic_insertelement_v16i32(<16 x i32> addrspace(1)* %out, <16 x i32> %a, i32 %b) nounwind {
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%vecins = insertelement <16 x i32> %a, i32 5, i32 %b
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store <16 x i32> %vecins, <16 x i32> addrspace(1)* %out, align 64
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v2i16:
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; FIXMESI: buffer_store_dwordx2
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define void @dynamic_insertelement_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> %a, i32 %b) nounwind {
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%vecins = insertelement <2 x i16> %a, i16 5, i32 %b
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store <2 x i16> %vecins, <2 x i16> addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v4i16:
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; FIXMESI: buffer_store_dwordx4
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define void @dynamic_insertelement_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> %a, i32 %b) nounwind {
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%vecins = insertelement <4 x i16> %a, i16 5, i32 %b
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store <4 x i16> %vecins, <4 x i16> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v2i8:
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; FIXMESI: BUFFER_STORE_USHORT
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define void @dynamic_insertelement_v2i8(<2 x i8> addrspace(1)* %out, <2 x i8> %a, i32 %b) nounwind {
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%vecins = insertelement <2 x i8> %a, i8 5, i32 %b
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store <2 x i8> %vecins, <2 x i8> addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v4i8:
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; FIXMESI: buffer_store_dword
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define void @dynamic_insertelement_v4i8(<4 x i8> addrspace(1)* %out, <4 x i8> %a, i32 %b) nounwind {
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%vecins = insertelement <4 x i8> %a, i8 5, i32 %b
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store <4 x i8> %vecins, <4 x i8> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v8i8:
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; FIXMESI: buffer_store_dwordx2
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define void @dynamic_insertelement_v8i8(<8 x i8> addrspace(1)* %out, <8 x i8> %a, i32 %b) nounwind {
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%vecins = insertelement <8 x i8> %a, i8 5, i32 %b
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store <8 x i8> %vecins, <8 x i8> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v16i8:
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; FIXMESI: buffer_store_dwordx4
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define void @dynamic_insertelement_v16i8(<16 x i8> addrspace(1)* %out, <16 x i8> %a, i32 %b) nounwind {
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%vecins = insertelement <16 x i8> %a, i8 5, i32 %b
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store <16 x i8> %vecins, <16 x i8> addrspace(1)* %out, align 16
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ret void
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}
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; This test requires handling INSERT_SUBREG in SIFixSGPRCopies. Check that
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; the compiler doesn't crash.
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; SI-LABEL: {{^}}insert_split_bb:
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define void @insert_split_bb(<2 x i32> addrspace(1)* %out, i32 addrspace(1)* %in, i32 %a, i32 %b) {
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entry:
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%0 = insertelement <2 x i32> undef, i32 %a, i32 0
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%1 = icmp eq i32 %a, 0
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br i1 %1, label %if, label %else
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if:
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%2 = load i32 addrspace(1)* %in
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%3 = insertelement <2 x i32> %0, i32 %2, i32 1
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br label %endif
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else:
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%4 = getelementptr i32 addrspace(1)* %in, i32 1
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%5 = load i32 addrspace(1)* %4
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%6 = insertelement <2 x i32> %0, i32 %5, i32 1
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br label %endif
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endif:
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%7 = phi <2 x i32> [%3, %if], [%6, %else]
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store <2 x i32> %7, <2 x i32> addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v2f64:
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: s_endpgm
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define void @dynamic_insertelement_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %a, i32 %b) nounwind {
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%vecins = insertelement <2 x double> %a, double 8.0, i32 %b
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store <2 x double> %vecins, <2 x double> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v2i64:
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: s_endpgm
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define void @dynamic_insertelement_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %a, i32 %b) nounwind {
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%vecins = insertelement <2 x i64> %a, i64 5, i32 %b
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store <2 x i64> %vecins, <2 x i64> addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v4f64:
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: s_endpgm
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define void @dynamic_insertelement_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %a, i32 %b) nounwind {
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%vecins = insertelement <4 x double> %a, double 8.0, i32 %b
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store <4 x double> %vecins, <4 x double> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: {{^}}dynamic_insertelement_v8f64:
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: buffer_store_dwordx2
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; SI: s_endpgm
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define void @dynamic_insertelement_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %a, i32 %b) nounwind {
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%vecins = insertelement <8 x double> %a, double 8.0, i32 %b
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store <8 x double> %vecins, <8 x double> addrspace(1)* %out, align 16
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ret void
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}
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