llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-15 04:08:07 +00:00

History

Anton Korobeynikov 01209bc12a Alpha always requires global relocations to be r/w regardless of PIC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68006 91177308-0d34-0410-b5e6-96231b3b80d8		2009-03-29 17:14:14 +00:00
..
AsmPrinter	CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.	2009-03-25 01:47:28 +00:00
Alpha.h	CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.	2009-03-25 01:47:28 +00:00
Alpha.td	Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.	2008-11-24 07:34:46 +00:00
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaInstrFormats.td	Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.	2008-12-03 18:15:48 +00:00
AlphaInstrInfo.cpp	Factor out the code to add a MachineOperand to a MachineInstrBuilder.	2009-02-18 05:45:50 +00:00
AlphaInstrInfo.h	Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty	2009-02-09 07:14:22 +00:00
AlphaInstrInfo.td	Add support to tablegen for naming the nodes themselves, not just the operands,	2009-03-19 05:21:56 +00:00
AlphaISelDAGToDAG.cpp	Remove non-DebugLoc forms of CopyToReg and CopyFromReg.	2009-02-04 23:02:30 +00:00
AlphaISelLowering.cpp	Remove non-DebugLoc versions of BuildMI from Alpha and Cell.	2009-02-13 02:30:42 +00:00
AlphaISelLowering.h	Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing	2009-02-07 16:15:20 +00:00
AlphaJITInfo.cpp	Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr.	2008-11-08 08:02:53 +00:00
AlphaJITInfo.h
AlphaLLRP.cpp	Remove non-DebugLoc versions of BuildMI from Alpha and Cell.	2009-02-13 02:30:42 +00:00
AlphaRegisterInfo.cpp	Propagate debug loc info through prologue/epilogue.	2009-02-23 00:42:30 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp	Alpha always requires global relocations to be r/w regardless of PIC.	2009-03-29 17:14:14 +00:00
AlphaTargetAsmInfo.h	Alpha always requires global relocations to be r/w regardless of PIC.	2009-03-29 17:14:14 +00:00
AlphaTargetMachine.cpp	CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.	2009-03-25 01:47:28 +00:00
AlphaTargetMachine.h	CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.	2009-03-25 01:47:28 +00:00
CMakeLists.txt	CMake: corrected split of Alpha and Sparc AsmPrinters.	2008-11-11 17:10:13 +00:00
Makefile	Removed trailing whitespace from Makefiles.	2009-01-09 16:44:42 +00:00
README.txt	Readme	2007-03-31 15:05:44 +00:00

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html