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llvm-6502/test/CodeGen/Mips/llvm-ir
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Vasileios Kalintiris 7db2065236 [mips] Enable code generation for MIPS-III. 
Summary:
This commit enables the MIPS-III target and adds support for code
generation of SELECT nodes. We have to use pseudo-instructions with
custom inserters for these nodes as MIPS-III CPUs do not have
conditional-move instructions.

Depends on D6212

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224128 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 15:16:46 +00:00
..
call.ll
indirectbr.ll
mul.ll
ret.ll
select.ll [mips] Enable code generation for MIPS-III. 2014-12-12 15:16:46 +00:00