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0543dab791
Summary:
Two exceptions to this:
test/CodeGen/Mips/octeon.ll
test/CodeGen/Mips/octeon_popcnt.ll
these test extensions to MIPS64
One test is altered for MIPS-IV:
test/CodeGen/Mips/mips64countleading.ll
Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests
that dclo/dclz are not emitted.
Four tests fail and are not in this patch:
test/CodeGen/Mips/abicalls.ll
test/CodeGen/Mips/fcopysign-f32-f64.ll
test/CodeGen/Mips/fcopysign.ll
test/CodeGen/Mips/stack-alignment.ll
Depends on D3343
Reviewers: matheusalmeida, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3344
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206185 91177308-0d34-0410-b5e6-96231b3b80d8
61 lines
1.9 KiB
LLVM
61 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=mips64el -mcpu=mips4 -mattr=-n64,n64 | FileCheck %s -check-prefix=CHECK-N64
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; RUN: llc < %s -march=mips64el -mcpu=mips4 -mattr=-n64,n32 | FileCheck %s -check-prefix=CHECK-N32
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; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n64 | FileCheck %s -check-prefix=CHECK-N64
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; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n32 | FileCheck %s -check-prefix=CHECK-N32
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@f0 = common global float 0.000000e+00, align 4
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@d0 = common global double 0.000000e+00, align 8
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@f1 = common global float 0.000000e+00, align 4
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@d1 = common global double 0.000000e+00, align 8
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define float @funcfl1() nounwind readonly {
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entry:
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; CHECK-N64: funcfl1
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; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0)
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; CHECK-N64: lwc1 $f{{[0-9]+}}, 0($[[R0]])
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; CHECK-N32: funcfl1
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; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(f0)
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; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]])
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%0 = load float* @f0, align 4
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ret float %0
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}
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define double @funcfl2() nounwind readonly {
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entry:
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; CHECK-N64: funcfl2
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; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(d0)
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; CHECK-N64: ldc1 $f{{[0-9]+}}, 0($[[R0]])
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; CHECK-N32: funcfl2
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; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(d0)
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; CHECK-N32: ldc1 $f{{[0-9]+}}, 0($[[R0]])
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%0 = load double* @d0, align 8
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ret double %0
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}
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define void @funcfs1() nounwind {
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entry:
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; CHECK-N64: funcfs1
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; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0)
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; CHECK-N64: swc1 $f{{[0-9]+}}, 0($[[R0]])
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; CHECK-N32: funcfs1
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; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(f0)
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; CHECK-N32: swc1 $f{{[0-9]+}}, 0($[[R0]])
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%0 = load float* @f1, align 4
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store float %0, float* @f0, align 4
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ret void
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}
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define void @funcfs2() nounwind {
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entry:
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; CHECK-N64: funcfs2
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; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(d0)
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; CHECK-N64: sdc1 $f{{[0-9]+}}, 0($[[R0]])
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; CHECK-N32: funcfs2
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; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(d0)
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; CHECK-N32: sdc1 $f{{[0-9]+}}, 0($[[R0]])
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%0 = load double* @d1, align 8
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store double %0, double* @d0, align 8
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ret void
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}
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