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9994b911f4
This patch does the following: * Fix FIXME on `needsStackRealignment`: it is now shared between multiple targets, implemented in `TargetRegisterInfo`, and isn't `virtual` anymore. This will break out-of-tree targets, silently if they used `virtual` and with a build error if they used `override`. * Factor out `canRealignStack` as a `virtual` function on `TargetRegisterInfo`, by default only looks for the `no-realign-stack` function attribute. Multiple targets duplicated the same `needsStackRealignment` code: - Aarch64. - ARM. - Mips almost: had extra `DEBUG` diagnostic, which the default implementation now has. - PowerPC. - WebAssembly. - x86 almost: has an extra `-force-align-stack` option, which the default implementation now has. The default implementation of `needsStackRealignment` used to just return `false`. My current patch changes the behavior by simply using the above shared behavior. This affects: - AMDGPU - BPF - CppBackend - MSP430 - NVPTX - Sparc - SystemZ - XCore - Out-of-tree targets This is a breaking change! `make check` passes. The only implementation of the `virtual` function (besides the slight different in x86) was Hexagon (which did `MF.getFrameInfo()->getMaxAlignment() > 8`), and potentially some out-of-tree targets. Hexagon now uses the default implementation. `needsStackRealignment` was being overwritten in `<Target>GenRegisterInfo.inc`, to return `false` as the default also did. That was odd and is now gone. Reviewers: sunfish Subscribers: aemerson, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242727 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| AsmParser | ||
| Disassembler | ||
| InstPrinter | ||
| MCTargetDesc | ||
| TargetInfo | ||
| Utils | ||
| AArch64.h | ||
| AArch64.td | ||
| AArch64A53Fix835769.cpp | ||
| AArch64A57FPLoadBalancing.cpp | ||
| AArch64AddressTypePromotion.cpp | ||
| AArch64AdvSIMDScalarPass.cpp | ||
| AArch64AsmPrinter.cpp | ||
| AArch64BranchRelaxation.cpp | ||
| AArch64CallingConvention.h | ||
| AArch64CallingConvention.td | ||
| AArch64CleanupLocalDynamicTLSPass.cpp | ||
| AArch64CollectLOH.cpp | ||
| AArch64ConditionalCompares.cpp | ||
| AArch64ConditionOptimizer.cpp | ||
| AArch64DeadRegisterDefinitionsPass.cpp | ||
| AArch64ExpandPseudoInsts.cpp | ||
| AArch64FastISel.cpp | ||
| AArch64FrameLowering.cpp | ||
| AArch64FrameLowering.h | ||
| AArch64InstrAtomics.td | ||
| AArch64InstrFormats.td | ||
| AArch64InstrInfo.cpp | ||
| AArch64InstrInfo.h | ||
| AArch64InstrInfo.td | ||
| AArch64ISelDAGToDAG.cpp | ||
| AArch64ISelLowering.cpp | ||
| AArch64ISelLowering.h | ||
| AArch64LoadStoreOptimizer.cpp | ||
| AArch64MachineCombinerPattern.h | ||
| AArch64MachineFunctionInfo.h | ||
| AArch64MCInstLower.cpp | ||
| AArch64MCInstLower.h | ||
| AArch64PBQPRegAlloc.cpp | ||
| AArch64PBQPRegAlloc.h | ||
| AArch64PerfectShuffle.h | ||
| AArch64PromoteConstant.cpp | ||
| AArch64RegisterInfo.cpp | ||
| AArch64RegisterInfo.h | ||
| AArch64RegisterInfo.td | ||
| AArch64SchedA53.td | ||
| AArch64SchedA57.td | ||
| AArch64SchedA57WriteRes.td | ||
| AArch64SchedCyclone.td | ||
| AArch64Schedule.td | ||
| AArch64SelectionDAGInfo.cpp | ||
| AArch64SelectionDAGInfo.h | ||
| AArch64StorePairSuppress.cpp | ||
| AArch64Subtarget.cpp | ||
| AArch64Subtarget.h | ||
| AArch64TargetMachine.cpp | ||
| AArch64TargetMachine.h | ||
| AArch64TargetObjectFile.cpp | ||
| AArch64TargetObjectFile.h | ||
| AArch64TargetTransformInfo.cpp | ||
| AArch64TargetTransformInfo.h | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| Makefile | ||