AArch64: add comment missed out from earlier patch.

Helps explain some of the background behind this bit of code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242503 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2015-07-17 03:31:50 +00:00
parent c8fe2bf3a4
commit b974e0babe

View File

@ -2062,6 +2062,10 @@ SDNode *AArch64DAGToDAGISel::SelectLIBM(SDNode *N) {
SmallVector<SDValue, 2> Ops;
Ops.push_back(In);
// C11 leaves it implementation-defined whether these operations trigger an
// inexact exception. IEEE says they don't. Unfortunately, Darwin decided
// they do so we sometimes have to insert a special instruction just to set
// the right bit in FPSR.
if (Subtarget->isTargetDarwin() && !TM.Options.UnsafeFPMath) {
SDNode *FRINTX = CurDAG->getMachineNode(FRINTXOpc, dl, VT, MVT::Glue, In);
Ops.push_back(SDValue(FRINTX, 1));