Bill Schmidt 9a2a305ed4 [PowerPC 3/4] Little-endian adjustments for VSX vector shuffle ... When performing instruction selection for ISD::VECTOR_SHUFFLE, there is special code for handling v2f64 and v2i64 using VSX instructions. This code must be adjusted for little-endian. Because the two inputs are treated as a double-wide register, we must swap their order for little endian. To get the appropriate mask elements to use with the big-endian biased XXPERMDI instruction, we must reverse their order and invert the bits. A new test is added to test the 16 possible values of the shuffle mask. It is initially disabled for reasons specified in the test. It is re-enabled by patch 4/4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223791 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-09 16:52:29 +00:00
..
AArch64	[CodeGenPrepare] Split branch conditions into multiple conditional branches.	2014-12-09 16:36:13 +00:00
ARM	Add missing FP build attribute tests.	2014-12-05 08:22:47 +00:00
CPP
Generic
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs
Mips	[mips] Fix passing of small structures for big-endian O32.	2014-12-02 20:40:27 +00:00
MSP430
NVPTX	[NVPTX] Do not emit .weak symbols for NVPTX	2014-12-01 21:16:17 +00:00
PowerPC	[PowerPC 3/4] Little-endian adjustments for VSX vector shuffle	2014-12-09 16:52:29 +00:00
R600	MISched: Fix moving stores across barriers	2014-12-08 23:36:48 +00:00
SPARC
SystemZ
Thumb	Re-add support to llvm-objdump for Mach-O universal files and archives with -macho	2014-12-04 23:56:27 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[x86] Fix the test to actually test things for the CPU names, add the	2014-12-09 14:25:55 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00