Eric Christopher 9a9d275dc7 Custom lower the memory barrier instructions and add support ... for lowering without sse2. Add a couple of new testcases. Fixes a few libgomp tests and latent bugs. Remove a few todos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109078 91177308-0d34-0410-b5e6-96231b3b80d8		2010-07-22 02:48:34 +00:00
..
Alpha
ARM	More register pressure aware scheduling work.	2010-07-21 23:53:58 +00:00
Blackfin	Remove TargetInstrInfo::copyRegToReg entirely.	2010-07-11 17:01:17 +00:00
CBackend
CellSPU	Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.	2010-07-16 04:45:42 +00:00
CPP
Generic	Fix up -fstack-protector on linux to use the segment	2010-07-06 05:18:56 +00:00
MBlaze
Mips	Fix PR7174, a couple o Mips fixes:	2010-07-20 08:37:04 +00:00
MSP430
PIC16
PowerPC	Consider this function:	2010-07-16 22:51:10 +00:00
SPARC
SystemZ
Thumb	Feed the right output into FileCheck.	2010-07-16 10:58:02 +00:00
Thumb2	update tests for smarter BIC usage	2010-07-20 16:16:48 +00:00
X86	Custom lower the memory barrier instructions and add support	2010-07-22 02:48:34 +00:00
XCore