llvm-6502/test/CodeGen
Bob Wilson 665814b6be Add support for alignment operands on VLD1-lane instructions.
This is another part of the fix for Radar 8599955.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117976 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:40:51 +00:00
..
Alpha
ARM Add support for alignment operands on VLD1-lane instructions. 2010-11-01 23:40:51 +00:00
Blackfin
CBackend
CellSPU Change v64 datalayout in SPU. 2010-10-26 10:45:47 +00:00
CPP
Generic
MBlaze Recommit 116986 with capitalization typo fixed. 2010-10-21 03:57:26 +00:00
Mips
MSP430
PowerPC PowerPC varargs functions store live-in registers on the stack. Make sure we use 2010-10-11 20:43:09 +00:00
PTX Add test case mov.ll for PTX device function 2010-10-19 13:21:51 +00:00
SPARC
SystemZ
Thumb Overhaul memory barriers in the ARM backend. Radar 8601999. 2010-10-30 00:54:37 +00:00
Thumb2 Overhaul memory barriers in the ARM backend. Radar 8601999. 2010-10-30 00:54:37 +00:00
X86 Fix pastos in handling of AVX cvttsd2si, PR8491. 2010-10-28 00:35:54 +00:00
XCore
thumb2-mul.ll