Bill Wendling 9af7e9a1b5 Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by ...

more than just the stack slot coloring algorithm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8

2010-05-26 19:46:12 +00:00

..

Analysis.h

Move several SelectionDAG-independent utility functions out of the

2010-04-21 01:22:34 +00:00

AsmPrinter.h

Rework global alignment computation again. Now we do round up

2010-04-28 19:58:07 +00:00

BinaryObject.h

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CalcSpillWeights.h

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CallingConvLower.h

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FastISel.h

Add initial kill flag support to FastISel.

2010-05-11 23:54:07 +00:00

GCMetadata.h

Add const qualifiers to CodeGen's use of LLVM IR constructs.

2010-04-15 01:51:59 +00:00

GCMetadataPrinter.h

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GCs.h

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GCStrategy.h

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IntrinsicLowering.h

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ISDOpcodes.h

Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.

2010-05-22 01:06:18 +00:00

JITCodeEmitter.h

Add a "PadTo" field to the emitULEB128Bytes method. This will pad out to the

2010-04-18 00:51:49 +00:00

LatencyPriorityQueue.h

Eliminate the use of PriorityQueue and just use a std::vector,

2010-05-26 18:52:00 +00:00

LinkAllAsmWriterComponents.h

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LinkAllCodegenComponents.h

Add a hybrid bottom up scheduler that reduce register usage while avoiding

2010-05-20 06:13:19 +00:00

LiveInterval.h

Removed scaleNumbering method declaration from LiveInterval (not defined, not used).

2010-05-21 03:04:04 +00:00

LiveIntervalAnalysis.h

Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.

2010-05-05 18:27:40 +00:00

LiveStackAnalysis.h

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LiveVariables.h

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MachineBasicBlock.h

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MachineCodeEmitter.h

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MachineCodeInfo.h

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MachineConstantPool.h

Add const qualifiers to CodeGen's use of LLVM IR constructs.

2010-04-15 01:51:59 +00:00

MachineDominators.h

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MachineFrameInfo.h

Implement @llvm.returnaddress. rdar://8015977.

2010-05-22 01:47:14 +00:00

MachineFunction.h

Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by

2010-05-26 19:46:12 +00:00

MachineFunctionAnalysis.h

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MachineFunctionPass.h

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MachineInstr.h

- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs

2010-05-21 20:53:24 +00:00

MachineInstrBuilder.h

Add const qualifiers to CodeGen's use of LLVM IR constructs.

2010-04-15 01:51:59 +00:00

MachineJumpTableInfo.h

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MachineLocation.h

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MachineLoopInfo.h

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MachineMemOperand.h

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MachineModuleInfo.h

The JIT calls TidyLandingPads to tidy up the landing pads. However, because the

2010-04-16 08:46:10 +00:00

MachineModuleInfoImpls.h

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MachineOperand.h

Add const qualifiers to CodeGen's use of LLVM IR constructs.

2010-04-15 01:51:59 +00:00

MachinePassRegistry.h

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MachineRegisterInfo.h

Avoid adding duplicate function live-in's.

2010-05-24 21:33:37 +00:00

MachineRelocation.h

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MachineSSAUpdater.h

Combine the implementations of the core part of the SSAUpdater and

2010-05-04 23:18:19 +00:00

MachORelocation.h

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ObjectCodeEmitter.h

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Passes.h

Add fast register allocator, enabled with -regalloc=fast.

2010-04-21 18:02:42 +00:00

ProcessImplicitDefs.h

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PseudoSourceValue.h

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RegAllocRegistry.h

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RegisterCoalescer.h

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RegisterScavenging.h

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RuntimeLibcalls.h

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ScheduleDAG.h

Change push_all to a non-virtual function and implement it in the

2010-05-26 01:10:55 +00:00

ScheduleHazardRecognizer.h

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SchedulerRegistry.h

Add a hybrid bottom up scheduler that reduce register usage while avoiding

2010-05-20 06:13:19 +00:00

SelectionDAG.h

Implement a bunch more TargetSelectionDAGInfo infrastructure.

2010-05-11 17:31:57 +00:00

SelectionDAGISel.h

Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel

2010-04-22 20:46:50 +00:00

SelectionDAGNodes.h

Add const qualifiers to CodeGen's use of LLVM IR constructs.

2010-04-15 01:51:59 +00:00

SlotIndexes.h

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TargetLoweringObjectFileImpl.h

More data/parsing support for tls directives. Add a few more testcases

2010-05-17 22:53:55 +00:00

ValueTypes.h

Fix enum to address array bounds regression.

2010-05-18 21:22:12 +00:00

ValueTypes.td

Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.

2010-05-13 23:55:47 +00:00