llvm-6502/test/CodeGen
2011-02-04 01:43:25 +00:00
..
Alpha
ARM Given a pair of floating point load and store, if there are no other uses of 2011-02-02 01:06:55 +00:00
Blackfin Remove TargetInstrInfo::copyRegToReg entirely. 2010-07-11 17:01:17 +00:00
CBackend
CellSPU
CPP
Generic
MBlaze
Mips
MSP430
PowerPC
PTX
SPARC Pass sret arguments through the stack instead of through registers in Sparc backend. It makes the code generated more compliant with the sparc32 ABI. 2011-01-22 13:05:16 +00:00
SystemZ
Thumb
Thumb2 Last round of fixes for movw + movt global address codegen. 2011-01-21 18:55:51 +00:00
X86 DebugLoc associated with a machine instruction is used to emit location entries. DebugLoc associated with a DBG_VALUE is used to identify lexical scope of the variable. After register allocation, while inserting DBG_VALUE remember original debug location for the first instruction and reuse it, otherwise dwarf writer may be mislead in identifying the variable's scope. 2011-02-04 01:43:25 +00:00
XCore Add XCore intrinsics for resource instructions. 2011-02-03 13:14:25 +00:00
thumb2-mul.ll