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Add XCore intrinsics for resource instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124794 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Osborne
parent
76422f3e08
commit
17c1e51d22
@ -11,4 +11,24 @@
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let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
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def int_xcore_bitrev : Intrinsic<[llvm_i32_ty],[llvm_i32_ty],[IntrNoMem]>;
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def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
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// Resource instructions.
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def int_xcore_getr : Intrinsic<[llvm_anyptr_ty],[llvm_i32_ty]>;
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def int_xcore_freer : Intrinsic<[],[llvm_anyptr_ty],
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[NoCapture<0>]>;
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def int_xcore_in : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],[NoCapture<0>]>;
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def int_xcore_int : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],
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[NoCapture<0>]>;
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def int_xcore_inct : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty],
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[NoCapture<0>]>;
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def int_xcore_out : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
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[NoCapture<0>]>;
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def int_xcore_outt : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
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[NoCapture<0>]>;
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def int_xcore_outct : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
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[NoCapture<0>]>;
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def int_xcore_chkct : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
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[NoCapture<0>]>;
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def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
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[NoCapture<0>]>;
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}
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@ -720,9 +720,8 @@ def NEG : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b),
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"neg $dst, $b",
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[(set GRRegs:$dst, (ineg GRRegs:$b))]>;
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// TODO setd, eet, eef, getts, setpt, outct, inct, chkct, outt, intt, out,
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// in, outshr, inshr, testct, testwct, tinitpc, tinitdp, tinitsp, tinitcp,
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// tsetmr, sext (reg), zext (reg)
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// TODO setd, eet, eef, getts, setpt, outshr, inshr, testwct, tinitpc, tinitdp,
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// tinitsp, tinitcp, tsetmr, sext (reg), zext (reg)
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let Constraints = "$src1 = $dst" in {
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let neverHasSideEffects = 1 in
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def SEXT_rus : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$src1, i32imm:$src2),
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@ -748,6 +747,50 @@ def MKMSK_2r : _FRUS<(outs GRRegs:$dst), (ins GRRegs:$size),
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"mkmsk $dst, $size",
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[(set GRRegs:$dst, (add (shl 1, GRRegs:$size), 0xffffffff))]>;
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def GETR_rus : _FRUS<(outs GRRegs:$dst), (ins i32imm:$type),
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"getr $dst, $type",
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[(set GRRegs:$dst, (int_xcore_getr immUs:$type))]>;
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def OUTCT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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"outct res[$r], $val",
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[(int_xcore_outct GRRegs:$r, GRRegs:$val)]>;
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def OUTCT_rus : _F2R<(outs), (ins GRRegs:$r, i32imm:$val),
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"outct res[$r], $val",
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[(int_xcore_outct GRRegs:$r, immUs:$val)]>;
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def OUTT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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"outt res[$r], $val",
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[(int_xcore_outt GRRegs:$r, GRRegs:$val)]>;
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def OUT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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"out res[$r], $val",
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[(int_xcore_out GRRegs:$r, GRRegs:$val)]>;
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def INCT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r),
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"inct $dst, res[$r]",
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[(set GRRegs:$dst, (int_xcore_inct GRRegs:$r))]>;
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def INT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r),
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"int $dst, res[$r]",
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[(set GRRegs:$dst, (int_xcore_int GRRegs:$r))]>;
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def IN_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r),
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"in $dst, res[$r]",
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[(set GRRegs:$dst, (int_xcore_in GRRegs:$r))]>;
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def CHKCT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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"chkct res[$r], $val",
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[(int_xcore_chkct GRRegs:$r, GRRegs:$val)]>;
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def CHKCT_rus : _F2R<(outs), (ins GRRegs:$r, i32imm:$val),
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"chkct res[$r], $val",
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[(int_xcore_chkct GRRegs:$r, immUs:$val)]>;
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def SETD_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val),
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"setd res[$r], $val",
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[(int_xcore_setd GRRegs:$r, GRRegs:$val)]>;
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// Two operand long
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// TODO settw, setclk, setrdy, setpsc, endin, peek,
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// getd, testlcl, tinitlr, getps, setps
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@ -764,7 +807,7 @@ def CLZ_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
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[(set GRRegs:$dst, (ctlz GRRegs:$src))]>;
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// One operand short
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// TODO edu, eeu, waitet, waitef, freer, tstart, msync, mjoin, syncr, clrtp
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// TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, syncr, clrtp
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// setdp, setcp, setv, setev, kcall
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// dgetreg
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let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
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@ -805,6 +848,10 @@ def BLA_1r : _F1R<(outs), (ins GRRegs:$addr, variable_ops),
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[(XCoreBranchLink GRRegs:$addr)]>;
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}
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def FREER_1r : _F1R<(outs), (ins GRRegs:$r),
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"freer res[$r]",
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[(int_xcore_freer GRRegs:$r)]>;
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// Zero operand short
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// TODO waiteu, clre, ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
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// stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
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97
test/CodeGen/XCore/resources.ll
Normal file
97
test/CodeGen/XCore/resources.ll
Normal file
@ -0,0 +1,97 @@
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; RUN: llc -march=xcore < %s | FileCheck %s
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declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
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declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
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declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
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declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
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declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
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declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
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declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
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define i8 addrspace(1)* @getr() {
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; CHECK: getr:
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; CHECK: getr r0, 5
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%result = call i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 5)
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ret i8 addrspace(1)* %result
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}
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define void @freer(i8 addrspace(1)* %r) {
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; CHECK: freer:
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; CHECK: freer res[r0]
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call void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
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ret void
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}
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define i32 @in(i8 addrspace(1)* %r) {
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; CHECK: in:
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; CHECK: in r0, res[r0]
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%result = call i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
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ret i32 %result
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}
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define i32 @int(i8 addrspace(1)* %r) {
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; CHECK: int:
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; CHECK: int r0, res[r0]
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%result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
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ret i32 %result
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}
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define i32 @inct(i8 addrspace(1)* %r) {
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; CHECK: inct:
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; CHECK: inct r0, res[r0]
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%result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
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ret i32 %result
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}
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define void @out(i8 addrspace(1)* %r, i32 %value) {
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; CHECK: out:
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; CHECK: out res[r0], r1
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call void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
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ret void
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}
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define void @outt(i8 addrspace(1)* %r, i32 %value) {
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; CHECK: outt:
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; CHECK: outt res[r0], r1
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call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
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ret void
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}
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define void @outct(i8 addrspace(1)* %r, i32 %value) {
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; CHECK: outct:
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; CHECK: outct res[r0], r1
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call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
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ret void
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}
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define void @outcti(i8 addrspace(1)* %r) {
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; CHECK: outcti:
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; CHECK: outct res[r0], 11
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call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 11)
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ret void
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}
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define void @chkct(i8 addrspace(1)* %r, i32 %value) {
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; CHECK: chkct:
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; CHECK: chkct res[r0], r1
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call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
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ret void
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}
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define void @chkcti(i8 addrspace(1)* %r) {
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; CHECK: chkcti:
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; CHECK: chkct res[r0], 11
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call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 11)
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ret void
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}
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define void @setd(i8 addrspace(1)* %r, i32 %value) {
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; CHECK: setd:
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; CHECK: setd res[r0], r1
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call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
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ret void
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}
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