Evan Cheng 9b82425cb0 Also CSE non-pic load from constant pools. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89440 91177308-0d34-0410-b5e6-96231b3b80d8		2009-11-20 02:10:27 +00:00
..
Alpha
ARM	Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.	2009-11-20 00:54:03 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic	Added a testcase for PR5495.	2009-11-16 20:03:13 +00:00
Mips	Unbreak test, Bruno please check.	2009-11-19 07:18:49 +00:00
MSP430
PIC16
PowerPC	Check if subreg index is zero.	2009-11-16 06:31:49 +00:00
SPARC
SystemZ
Thumb	More consistent thumb1 asm printing.	2009-11-19 06:57:41 +00:00
Thumb2	Also CSE non-pic load from constant pools.	2009-11-20 02:10:27 +00:00
X86	Test from Dhrystone to make sure that we're not emitting an aligned load for a	2009-11-19 01:33:57 +00:00
XCore	Add XCore support for indirectbr / blockaddress.	2009-11-18 23:20:42 +00:00