Evan Cheng 9b88d2d782 Tighten a ARM dag combine condition to avoid an identity transformation, which ... ends up introducing a cycle in the DAG. rdar://10196296 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140733 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-28 23:16:31 +00:00
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Analysis	indvars: generalize SCEV getPreStartForSignExtend.	2011-09-28 17:02:54 +00:00
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AsmParser
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CodeGen	Have the SjLjEHPrepare pass do some more heavy lifting.	2011-09-28 21:56:53 +00:00
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Object	Object: Add isSection{Data,BSS}.	2011-09-28 20:57:30 +00:00
Support	These symbols appear to be visible by SearchForAddressOfSymbol and no longer	2011-09-27 20:01:41 +00:00
Target	Tighten a ARM dag combine condition to avoid an identity transformation, which	2011-09-28 23:16:31 +00:00
Transforms	indvars should hoist [sz]ext because licm is not rerun.	2011-09-28 01:35:36 +00:00
VMCore	Check that catch clauses have pointer type.	2011-09-27 19:34:22 +00:00
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