mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-10 06:54:54 +00:00
When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: and r1, #ff and r1, r1, #ff rdar://9672867 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133973 91177308-0d34-0410-b5e6-96231b3b80d8 |
||
---|---|---|
.. | ||
ARM | ||
AsmParser | ||
COFF | ||
Disassembler | ||
ELF | ||
MachO | ||
MBlaze | ||
X86 |