Yunzhong Gao 685707c28e Adding intrinsics to the llvm backend for TBM instruction set. ... Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1750 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191539 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-27 18:38:42 +00:00
..
AArch64
ARM	ARM: Teach assembler to enforce constraints for ARM LDRD destination register operands.	2013-09-27 13:28:17 +00:00
AsmParser	MCParser/Debug info: Accept line number 0 as a legitimate value, since	2013-09-26 23:37:11 +00:00
COFF
Disassembler	Fixing Intel format of the vshufpd instruction.	2013-09-27 01:44:23 +00:00
ELF	Implements parsing and emitting of .cfi_window_save in MC.	2013-09-26 14:49:40 +00:00
MachO
Markup
Mips	[mips][msa] Direct Object Emission for 3RF instructions.	2013-09-26 21:31:43 +00:00
PowerPC
SystemZ
X86	Adding intrinsics to the llvm backend for TBM instruction set.	2013-09-27 18:38:42 +00:00