llvm-6502/test/CodeGen
Elena Demikhovsky f602040c49 Fixed a bug in printing "cmp" pseudo ops.
> This IR code
> %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14)
> fails with assertion:
>
> llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed.
> 0  llc             0x0000000001355803
> 1  llc             0x0000000001355dc9
> 2  libpthread.so.0 0x00007f79a30575d0
> 3  libc.so.6       0x00007f79a23a1945 gsignal + 53
> 4  libc.so.6       0x00007f79a23a2f21 abort + 385
> 5  libc.so.6       0x00007f79a239a810 __assert_fail + 240
> 6  llc             0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119

I added the full testing for all possible pseudo-ops of cmp.
I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp.

You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150068 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 08:37:26 +00:00
..
ARM [fast-isel] Add support for SUBs with non-legal types. 2012-02-08 02:45:44 +00:00
CBackend
CellSPU
CPP Testcase for commit 149833 (use of an uninitialized variable noticed 2012-02-05 19:27:57 +00:00
Generic
Hexagon
MBlaze
Mips Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 2012-02-03 04:33:00 +00:00
MSP430
PowerPC
PTX
SPARC
Thumb
Thumb2
X86 Fixed a bug in printing "cmp" pseudo ops. 2012-02-08 08:37:26 +00:00
XCore