llvm-6502/test/CodeGen
2015-07-26 17:02:25 +00:00
..
AArch64 [AArch64][FastISel] Always use an AND instruction when truncating to non-legal types. 2015-07-25 02:16:53 +00:00
AMDGPU
ARM DI/Verifier: Fix argument bitrot in DILocalVariable 2015-07-24 23:59:25 +00:00
BPF
CPP
Generic DI/Verifier: Fix argument bitrot in DILocalVariable 2015-07-24 23:59:25 +00:00
Hexagon [Hexagon] Generate MUX from conditional transfers when dot-new not possible 2015-07-20 21:23:25 +00:00
Inputs
Mips
MIR MIR Serialization: Serialize MachineFrameInfo's callee saved information. 2015-07-24 22:22:50 +00:00
MSP430
NVPTX [BranchFolding] do not iterate the aliases of virtual registers 2015-07-22 04:16:52 +00:00
PowerPC Fix PPCMaterializeInt to check the size of the integer based on the 2015-07-25 00:48:08 +00:00
SPARC
SystemZ
Thumb [ARM] Make the frame lowering code ready for shrink-wrapping. 2015-07-22 16:34:37 +00:00
Thumb2 ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 2015-07-21 00:18:59 +00:00
WebAssembly WebAssembly: test that valid -mcpu flags are accepted. 2015-07-23 23:00:04 +00:00
WinEH
X86 [X86][SSE] Refreshed vector bit count tests. 2015-07-26 17:02:25 +00:00
XCore