llvm-6502/lib/Target/CellSPU
Evan Cheng 9f1c8317a4 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53097 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-03 09:09:37 +00:00
..
CellSDKIntrinsics.td
Makefile
README.txt
SPU.h
SPU.td
SPUAsmPrinter.cpp Add CommonLinkage; currently tentative definitions 2008-05-14 20:12:51 +00:00
SPUCallingConv.td
SPUFrameInfo.cpp
SPUFrameInfo.h
SPUHazardRecognizers.cpp
SPUHazardRecognizers.h
SPUInstrBuilder.h
SPUInstrFormats.td
SPUInstrInfo.cpp - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. 2008-07-03 09:09:37 +00:00
SPUInstrInfo.h Change target-specific classes to use more precise static types. 2008-05-14 01:58:56 +00:00
SPUInstrInfo.td Add necessary 64-bit support so that gcc frontend compiles (mostly). Current 2008-06-02 22:18:03 +00:00
SPUISelDAGToDAG.cpp Split scheduling from instruction selection. 2008-06-30 20:45:06 +00:00
SPUISelLowering.cpp Add a new getMergeValues method that does not need 2008-07-02 17:40:58 +00:00
SPUISelLowering.h Wrap MVT::ValueType in a struct to get type safety 2008-06-06 12:08:01 +00:00
SPUMachineFunction.h
SPUNodes.td Add necessary 64-bit support so that gcc frontend compiles (mostly). Current 2008-06-02 22:18:03 +00:00
SPUOperands.td Add necessary 64-bit support so that gcc frontend compiles (mostly). Current 2008-06-02 22:18:03 +00:00
SPURegisterInfo.cpp Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating 2008-07-01 00:05:16 +00:00
SPURegisterInfo.h
SPURegisterInfo.td
SPURegisterNames.h
SPUSchedule.td
SPUSubtarget.cpp
SPUSubtarget.h
SPUTargetAsmInfo.cpp
SPUTargetAsmInfo.h
SPUTargetMachine.cpp
SPUTargetMachine.h Change target-specific classes to use more precise static types. 2008-05-14 01:58:56 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE. 

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Finish branch instructions, branch prediction

  These instructions were started, but only insofar as to get llvm-gcc-4.2's
  crtbegin.ll working (which doesn't.)

* Double floating point support

  This was started. "What's missing?" to be filled in.

* Intrinsics

  Lots of progress. "What's missing/incomplete?" to be filled in.

===-------------------------------------------------------------------------===