llvm-6502/lib/CodeGen/SelectionDAG
2007-09-28 23:53:40 +00:00
..
CallingConvLower.cpp
DAGCombiner.cpp
LegalizeDAG.cpp Teach SplitVectorOp how to split INSERT_VECTOR_ELT. 2007-09-28 23:53:40 +00:00
Makefile
ScheduleDAG.cpp If two instructions are both two-address code, favors (schedule closer to 2007-09-28 22:32:30 +00:00
ScheduleDAGList.cpp Trim some unneeded fields. 2007-09-28 19:24:24 +00:00
ScheduleDAGRRList.cpp If two instructions are both two-address code, favors (schedule closer to 2007-09-28 22:32:30 +00:00
ScheduleDAGSimple.cpp Allow copyRegToReg to emit cross register classes copies. 2007-09-26 06:25:56 +00:00
SelectionDAG.cpp Change APFloat::convertFromInteger to take the incoming 2007-09-21 22:09:37 +00:00
SelectionDAGISel.cpp Add sqrt and powi intrinsics for long double. 2007-09-28 01:08:20 +00:00
SelectionDAGPrinter.cpp Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered. 2007-09-25 01:54:36 +00:00
TargetLowering.cpp Add sqrt and powi intrinsics for long double. 2007-09-28 01:08:20 +00:00