llvm-6502/test/MC
Kit Barton 1b26bfbef1 Properly handle the mftb instruction.
The mftb instruction was incorrectly marked as deprecated in the PPC
Backend. Instead, it should not be treated as deprecated, but rather be
implemented using the mfspr instruction. A similar patch was put into GCC last
year. Details can be found at:

https://sourceware.org/ml/binutils/2014-11/msg00383.html.
This change will replace instances of the mftb instruction with the mfspr
instruction for all CPUs except 601 and pwr3. This will also be the default
behaviour.

Additional details can be found in:

https://llvm.org/bugs/show_bug.cgi?id=23680

Phabricator review: http://reviews.llvm.org/D10419


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 16:01:15 +00:00
..
AArch64
AMDGPU R600 -> AMDGPU rename 2015-06-13 03:28:10 +00:00
ARM
AsmParser
COFF
Disassembler [mips][microMIPS] Implement ERET and ERETNC instructions 2015-06-11 10:22:46 +00:00
ELF
Hexagon
MachO
Markup
Mips [mips][ias] Expand on r238751 to cover as many relocs as possible. 2015-06-16 13:46:26 +00:00
PowerPC Properly handle the mftb instruction. 2015-06-16 16:01:15 +00:00
Sparc [llvm-mc] The object form of the GNU triple should be the same as the string form. 2015-06-16 09:57:38 +00:00
SystemZ
X86 Add support for parsing the XOR operator in Intel syntax inline assembly. 2015-06-14 12:59:45 +00:00