Benjamin Kramer a0de26ce34 X86: Make shuffle -> shift conversion more aggressive about undefs. ... Shuffles that only move an element into position 0 of the vector are common in the output of the loop vectorizer and often generate suboptimal code when SSSE3 is not available. Lower them to vector shifts if possible. We still prefer palignr over psrldq because it has higher throughput on sandybridge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182102 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-17 14:48:34 +00:00
..
AArch64	More test coverage for addFrameMove.	2013-05-16 20:50:56 +00:00
ARM	ARM ISel: Don't create illegal types during LowerMUL	2013-05-14 22:33:24 +00:00
CPP
Generic
Hexagon	Hexagon: Pass to replace tranfer/copy instructions into combine instruction	2013-05-14 18:54:06 +00:00
Inputs
MBlaze
Mips	[mips] Improve instruction selection for pattern (store (fp_to_sint $src), $ptr).	2013-05-16 21:17:15 +00:00
MSP430	DAGCombiner: Simplify inverted bit tests	2013-05-08 06:44:42 +00:00
NVPTX
PowerPC	Fix cpu on test CodeGen/PowerPC/ctrloop-fp64.ll	2013-05-16 20:28:05 +00:00
R600	R600/SI: Add lit test coverage for the remaining patterns added recently	2013-05-14 09:53:30 +00:00
SI
SPARC	[Sparc] Prevent instructions that defines or uses %o7 to be in call's delay slot.	2013-05-16 23:53:29 +00:00
SystemZ	[SystemZ] Make use of SUBTRACT HALFWORD	2013-05-15 15:05:29 +00:00
Thumb
Thumb2	Fix ARM FastISel tests, as a first step to enabling ARM FastISel	2013-05-14 16:26:38 +00:00
X86	X86: Make shuffle -> shift conversion more aggressive about undefs.	2013-05-17 14:48:34 +00:00
XCore	[XCore] Fix handling of functions where only the LR is spilled.	2013-05-09 16:43:42 +00:00