llvm-6502/test/CodeGen
Oliver Stannard a19c2d4a6d ARM: Fix fastcc calling convention for Thumb1
When targetting Thumb1 on a processor which has a VFP unit (which
is not accessible from Thumb1), we were converting the fastcc calling
convention to AAPCS-VFP, which is not possible.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 08:33:03 +00:00
..
AArch64 [AArch64] Basic Sched Model for Cortex-A57. 2014-06-11 21:06:56 +00:00
ARM CodeGen: enable mov.w/mov.t pairs with minsize for WoA 2014-06-12 20:06:33 +00:00
CPP Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Generic Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute. 2014-06-05 19:29:43 +00:00
Hexagon Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Inputs
Mips [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 2014-06-12 15:00:17 +00:00
MSP430 Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
NVPTX Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
PowerPC [PPC64LE] Recognize shufflevector patterns for little endian 2014-06-10 14:35:01 +00:00
R600 R600/SI: Fix selection error on i64 rotl / rotr. 2014-06-13 04:00:30 +00:00
SPARC Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
SystemZ Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
Thumb ARM: Fix fastcc calling convention for Thumb1 2014-06-13 08:33:03 +00:00
Thumb2 Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
X86 [FastISel][X86] Add support for cvttss2si/cvttsd2si intrinsics. 2014-06-13 02:21:58 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00