llvm-6502/test/CodeGen
Richard Osborne 1d05b237a5 Fix pattern for LD16S_3r, add basic tests to check load / store instructions
are being properly selected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 17:06:59 +00:00
..
Alpha
ARM fix an arm codegen bug (the same as PR4482 on ppc) where available_externally 2009-07-15 04:12:33 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP
Generic remove tests for removed intrinsics. 2009-07-12 21:30:06 +00:00
IA64
Mips
MSP430
PowerPC get the PPC stub temporary label from the mangler instead of 2009-07-15 02:56:53 +00:00
SPARC
Thumb Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 2009-07-11 07:08:13 +00:00
Thumb2 Fix detection of valid BFC immediates. 2009-07-14 00:57:56 +00:00
X86 convert to filecheck style, simplify RUN line, and add comment. 2009-07-14 19:49:11 +00:00
XCore Fix pattern for LD16S_3r, add basic tests to check load / store instructions 2009-07-15 17:06:59 +00:00